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Date: Wed, 29 Mar 2017 18:42:46 +0800 From: Icenowy Zheng <icenowy@...c.io> To: Michael Turquette <mturquette@...libre.com>, Maxime Ripard <maxime.ripard@...e-electrons.com>, Rob Herring <robh+dt@...nel.org>, Chen-Yu Tsai <wens@...e.org> Cc: linux-clk@...r.kernel.org, devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org, linux-sunxi@...glegroups.com, Icenowy Zheng <icenowy@...c.xyz> Subject: [PATCH v3 5/5] arm64: allwinner: a64: add R_PIO pinctrl node From: Icenowy Zheng <icenowy@...c.xyz> Allwinner A64 have a dedicated pin controller to manage the PL pin bank. As the driver and the required clock support are added, add the device node for it. Signed-off-by: Icenowy Zheng <icenowy@...c.xyz> --- arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi index 0fe9865d4bd6..165dbc848aa6 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi @@ -411,5 +411,17 @@ #clock-cells = <1>; #reset-cells = <1>; }; + + r_pio: pinctrl@...02c00 { + compatible = "allwinner,sun50i-a64-r-pinctrl"; + reg = <0x01f02c00 0x400>; + interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&r_ccu CLK_APB0_PIO>, <&osc24M>, <&osc32k>; + clock-names = "apb", "hosc", "losc"; + gpio-controller; + #gpio-cells = <3>; + interrupt-controller; + #interrupt-cells = <3>; + }; }; }; -- 2.12.0
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