lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Tue, 14 Mar 2017 00:25:38 +0300
From:   Stas Sergeev <stsp@...t.ru>
To:     Ricardo Neri <ricardo.neri-calderon@...ux.intel.com>
Cc:     Andy Lutomirski <luto@...capital.net>,
        Ingo Molnar <mingo@...hat.com>,
        Thomas Gleixner <tglx@...utronix.de>,
        "H. Peter Anvin" <hpa@...or.com>,
        Andy Lutomirski <luto@...nel.org>,
        Borislav Petkov <bp@...e.de>,
        Peter Zijlstra <peterz@...radead.org>,
        Andrew Morton <akpm@...ux-foundation.org>,
        Brian Gerst <brgerst@...il.com>,
        Chris Metcalf <cmetcalf@...lanox.com>,
        Dave Hansen <dave.hansen@...ux.intel.com>,
        Paolo Bonzini <pbonzini@...hat.com>,
        Liang Z Li <liang.z.li@...el.com>,
        Masami Hiramatsu <mhiramat@...nel.org>,
        Huang Rui <ray.huang@....com>, Jiri Slaby <jslaby@...e.cz>,
        Jonathan Corbet <corbet@....net>,
        "Michael S. Tsirkin" <mst@...hat.com>,
        Paul Gortmaker <paul.gortmaker@...driver.com>,
        Vlastimil Babka <vbabka@...e.cz>,
        Chen Yucong <slaoub@...il.com>,
        Alexandre Julliard <julliard@...ehq.org>,
        Fenghua Yu <fenghua.yu@...el.com>,
        "Ravi V. Shankar" <ravi.v.shankar@...el.com>,
        Shuah Khan <shuah@...nel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        X86 ML <x86@...nel.org>, linux-msdos@...r.kernel.org,
        wine-devel@...ehq.org
Subject: Re: [v6 PATCH 00/21] x86: Enable User-Mode Instruction Prevention

11.03.2017 02:59, Ricardo Neri пишет:
> On Fri, 2017-03-10 at 14:33 +0300, Stas Sergeev wrote:
>
>> Why would you need one?
>> Or do you really want to allow these instructions
>> in v86 by the means of emulation? If so - this wasn't
>> clearly stated in the patch description, neither it was
>> properly discussed, it seems.
> It str and sldt can be emulated in vm86 but as Andy mention, the
> behavior sould be the same with and without emulation.
Why would you do that?
I looked up the dosemu2 CPU simulator code that
is used under x86-64. It says this:
---
                                     CODE_FLUSH();
                                     if (REALMODE()) goto illegal_op;
                                     PC += ModRMSim(PC+1, mode) + 1;
                                     error("SLDT not implemented\n");
                                     break;
                                 case 1: /* STR */
                                     /* Store Task Register */
                                     CODE_FLUSH();
                                     if (REALMODE()) goto illegal_op;
                                     PC += ModRMSim(PC+1, mode) + 1;
                                     error("STR not implemented\n");
                                     break;
...
                                 case 0: /* SGDT */
                                     /* Store Global Descriptor Table 
Register */
                                     PC++; PC += ModRM(opc, PC, 
mode|DATA16|MSTORE);
                                     error("SGDT not implemented\n");
                                     break;
                                 case 1: /* SIDT */
                                     /* Store Interrupt Descriptor Table 
Register */
                                     PC++; PC += ModRM(opc, PC, 
mode|DATA16|MSTORE);
                                     error("SIDT not implemented\n");
                                     break;
---

It only implements smsw.
So maybe you can make your code much
simpler and remove the unneeded emulation?
Same is for prot mode. You know the wine's
requirements now - they are very small. And
dosemu doesn't need anything at all but smsw.
And even smsw is very rare.

Powered by blists - more mailing lists