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Message-ID: <b3bed726-921c-0f5c-8b51-2beaa19921c9@arm.com>
Date: Thu, 30 Mar 2017 16:47:59 +0100
From: Sudeep Holla <sudeep.holla@....com>
To: Mike Leach <mike.leach@...aro.org>, Leo Yan <leo.yan@...aro.org>
Cc: Sudeep Holla <sudeep.holla@....com>,
Mathieu Poirier <mathieu.poirier@...aro.org>,
Jonathan Corbet <corbet@....net>,
Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Wei Xu <xuwei5@...ilicon.com>,
Catalin Marinas <catalin.marinas@....com>,
Will Deacon <will.deacon@....com>,
Andy Gross <andy.gross@...aro.org>,
David Brown <david.brown@...aro.org>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...eaurora.org>,
Guodong Xu <guodong.xu@...aro.org>,
John Stultz <john.stultz@...aro.org>,
linux-doc@...r.kernel.org, linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-arm-msm@...r.kernel.org, linux-soc@...r.kernel.org,
linux-clk@...r.kernel.org,
"Suzuki K. Poulose" <Suzuki.Poulose@....com>
Subject: Re: [PATCH v5 6/9] coresight: add support for CPU debug module
On 29/03/17 15:56, Mike Leach wrote:
[...]
>
> No - EDPRCR_COREPURQ and EDPRCR_CORENPDRQ have different semantics and purposes
>
> EDPRCR_COREPURQ is in the debug power domain an is tied to an external
> debug request that should be an input to the external (to the PE)
> system power controller.
> The requirement is that the system power controller powers up the core
> domain and does not power it down while it remains asserted.
>
> EDPRCR_CORENPDRQ is in the core power domain and thus to the specific
> core only. This ensures that any power control software running on
> that core should emulate a power down if this is set to one.
>
> We cannot know the power control design of the system, so the safe
> solution is to set both bits.
>
+1
I agree that's the safe bet.
--
Regards,
Sudeep
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