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Date: Thu, 30 Mar 2017 17:19:31 +0100 From: Will Deacon <will.deacon@....com> To: Lorenzo Pieralisi <lorenzo.pieralisi@....com> Cc: linux-pci@...r.kernel.org, linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org, Catalin Marinas <catalin.marinas@....com>, Arnd Bergmann <arnd@...db.de>, Russell King <linux@...linux.org.uk>, Pratyush Anand <pratyush.anand@...il.com>, Jingoo Han <jingoohan1@...il.com>, Bjorn Helgaas <bhelgaas@...gle.com>, Mingkai Hu <mingkai.hu@...escale.com>, John Garry <john.garry@...wei.com>, Tanmay Inamdar <tinamdar@....com>, Murali Karicheri <m-karicheri2@...com>, Bharat Kumar Gogada <bharat.kumar.gogada@...inx.com>, Ray Jui <rjui@...adcom.com>, Wenrui Li <wenrui.li@...k-chips.com>, Shawn Lin <shawn.lin@...k-chips.com>, Minghuan Lian <minghuan.Lian@...escale.com>, Jon Mason <jonmason@...adcom.com>, Gabriele Paoloni <gabriele.paoloni@...wei.com>, Thomas Petazzoni <thomas.petazzoni@...e-electrons.com>, Joao Pinto <Joao.Pinto@...opsys.com>, Thierry Reding <thierry.reding@...il.com>, Michal Simek <michal.simek@...inx.com>, Stanimir Varbanov <svarbanov@...sol.com>, Zhou Wang <wangzhou1@...ilicon.com>, Roy Zang <tie-fei.zang@...escale.com>, "Luis R. Rodriguez" <mcgrof@...nel.org> Subject: Re: [PATCH v2 05/22] ARM64: implement ioremap_nopost() interface On Mon, Mar 27, 2017 at 10:49:33AM +0100, Lorenzo Pieralisi wrote: > The PCI bus specifications (rev 3.0, 3.2.5 "Transaction Ordering > and Posting") defines rules for PCI configuration space transactions > ordering and posting, that state that configuration writes > are non-posted transactions. > > This rule is reinforced by the ARM v8 architecture reference manual > (issue A.k, Early Write Acknowledgment) that explicitly recommends > that No Early Write Acknowledgment attribute should be used to map > PCI configuration (write) transactions. > > Current ioremap interface on ARM64 implements mapping functions > where the Early Write Acknowledgment hint is enabled, so they > cannot be used to map PCI configuration space in a PCI specs > compliant way. > > Implement an ARM64 specific ioremap_nopost() interface > that allows to map PCI config region with nGnRnE attributes, providing > a remap function that complies with PCI specifications and the ARMv8 > architecture reference manual recommendations. > > Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@....com> > Cc: Will Deacon <will.deacon@....com> > Cc: Catalin Marinas <catalin.marinas@....com> > --- > arch/arm64/include/asm/io.h | 12 ++++++++++++ > 1 file changed, 12 insertions(+) Acked-by: Will Deacon <will.deacon@....com> Let me know if you need this taken via the arm64 tree. Will
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