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Message-ID: <lsq.1491052670.80726452@decadent.org.uk>
Date: Sat, 01 Apr 2017 14:17:50 +0100
From: Ben Hutchings <ben@...adent.org.uk>
To: linux-kernel@...r.kernel.org, stable@...r.kernel.org
CC: akpm@...ux-foundation.org, "Arnd Bergmann" <arnd@...db.de>,
linux-mips@...ux-mips.org, "Ralf Baechle" <ralf@...ux-mips.org>,
"Paul Burton" <paul.burton@...tec.com>
Subject: [PATCH 3.16 04/19] MIPS: preserve scalar FP CSR when switching
vector context
3.16.43-rc1 review patch. If anyone has any objections, please let me know.
------------------
From: Paul Burton <paul.burton@...tec.com>
commit b83406735a4ae0aff4b614664d6a64a0fd6b9917 upstream.
Switching the vector context implicitly saves & restores the state of
the aliased scalar FP data registers, however the scalar FP control
& status register is distinct from the MSA control & status register.
In order to allow scalar FP to function correctly in programs using
MSA, the scalar CSR needs to be saved & restored along with the MSA
vector context.
Signed-off-by: Paul Burton <paul.burton@...tec.com>
Cc: linux-mips@...ux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/7301/
Signed-off-by: Ralf Baechle <ralf@...ux-mips.org>
Signed-off-by: Ben Hutchings <ben@...adent.org.uk>
Cc: Arnd Bergmann <arnd@...db.de>
---
arch/mips/kernel/r4k_switch.S | 4 +++-
arch/mips/kernel/traps.c | 5 +++++
2 files changed, 8 insertions(+), 1 deletion(-)
--- a/arch/mips/kernel/r4k_switch.S
+++ b/arch/mips/kernel/r4k_switch.S
@@ -64,8 +64,10 @@
/* Check whether we're saving scalar or vector context. */
bgtz a3, 1f
- /* Save 128b MSA vector context. */
+ /* Save 128b MSA vector context + scalar FP control & status. */
+ cfc1 t1, fcr31
msa_save_all a0
+ sw t1, THREAD_FCR31(a0)
b 2f
1: /* Save 32b/64b scalar FP context. */
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -1159,6 +1159,11 @@ static int enable_restore_fp_context(int
/* We need to restore the vector context. */
restore_msa(current);
+
+ /* Restore the scalar FP control & status register */
+ if (!was_fpu_owner)
+ asm volatile("ctc1 %0, $31" : : "r"(current->thread.fpu.fcr31));
+
return 0;
}
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