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Message-Id: <20170403091444.29876-7-clabbe.montjoie@gmail.com>
Date: Mon, 3 Apr 2017 11:14:30 +0200
From: Corentin Labbe <clabbe.montjoie@...il.com>
To: robh+dt@...nel.org, mark.rutland@....com,
maxime.ripard@...e-electrons.com, wens@...e.org,
linux@...linux.org.uk, catalin.marinas@....com,
will.deacon@....com, peppe.cavallaro@...com,
alexandre.torgue@...com
Cc: devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
netdev@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
Corentin Labbe <clabbe.montjoie@...il.com>
Subject: [PATCH v3 06/20] ARM: dts: sunxi-h3-h5: Add dt node for the syscon control module
This patch add the dt node for the syscon register present on the
Allwinner H3/H5
Only two register are present in this syscon and the only one useful is
the one dedicated to EMAC clock..
Signed-off-by: Corentin Labbe <clabbe.montjoie@...il.com>
---
arch/arm/boot/dts/sunxi-h3-h5.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
index 6640ebfa..0815c00 100644
--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
@@ -102,6 +102,12 @@
#size-cells = <1>;
ranges;
+ syscon: syscon@...00000 {
+ compatible = "allwinner,sun8i-h3-system-controller",
+ "syscon";
+ reg = <0x01c00000 0x1000>;
+ };
+
dma: dma-controller@...02000 {
compatible = "allwinner,sun8i-h3-dma";
reg = <0x01c02000 0x1000>;
--
2.10.2
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