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Message-Id: <1491256652-18729-1-git-send-email-vikas.shivappa@linux.intel.com>
Date: Mon, 3 Apr 2017 14:57:24 -0700
From: Vikas Shivappa <vikas.shivappa@...ux.intel.com>
To: vikas.shivappa@...el.com, x86@...nel.org,
linux-kernel@...r.kernel.org
Cc: hpa@...or.com, tglx@...utronix.de, mingo@...nel.org,
peterz@...radead.org, ravi.v.shankar@...el.com,
tony.luck@...el.com, fenghua.yu@...el.com, h.peter.anvin@...el.com
Subject: [PATCH 0/8 V3] x86/intel_rdt: Intel Memory bandwidth allocation
Memory b/w allocation(MBA) is part of the Intel Resource Director
Technology (RDT). RDT helps monitor and share processor shared
resources. MBA helps enforce a limit on the memory bandwidth(b/w)
threads can use when they are scheduled. OS does the enforcement using
MSR(model specific register) interface and mapping the threads to
architecture specific CLOSids(class of service IDs).
The user interface is via the common resctrl fs for RDT features.
This can be used along with MBM (memory b/w monitoring) and cache
allocation to control and monitor the applications cache and memory
resources as per the QoS or other performance requirements. Use cases
could be large serverclusters, VM, cloud and container based services
where the admin or orchestration tools can use this framework to
manage/allocate these processor shared resources like other memory/cpu
resources to provide QoS guarantees. Detailed use case examples are
documented in the 01/08 Documentation patch.
Patches are dependent on :
https://marc.info/?l=linux-kernel&m=149125583824700
V3 changes
----------
Thanks to Thomas for all the feed back and below are the changes as per
the feedback:
- Did a lot of changes to make code more readable and follow convention
like moving the defines/variables, renaming, removing unnecessary return
value changes, unnecessary globals.
- Changed all change logs to follow context, problem, solution format.
- Fixed the issue where rdt init may return success even if all features
fail to init.
- Added warn_on to code that should be reached in case when system does
not support non_linear delay.
- The schemata interface is changed to allow user enter a value which
does not follow the granularity requirements and intermediate values are
just rounded off to next available value.
- Changed documentation to reflect these details and remove all
architectural details.
V2 changes
----------
Thanks to Thomas for all the feed back and below are the changes as per
the feedback:
- Sent the RDT generic improvements patch series seperately
- Split the info file/validate apis as prep patches to MBA
changes
- Fixed a lot of coding convention issues, variable initializations,
and removing unnecessary allocations etc.
- Changed the hotcpu handling for CLOS/RMID to zero the CLOSid/RMID when
cpu is offlined.
- Changed some naming conventions.
- Changed the interface to show the bandwidth percentage that can be
requested rather than showing h/w specific delay values which do not map
to a particular b/w percentage in non-linear scale
[PATCH 1/8] Documentation, x86: Intel Memory bandwidth allocation
[PATCH 2/8] x86/intel_rdt/mba: Generalize the naming to get ready for
[PATCH 3/8] x86/intel_rdt/mba: Memory b/w allocation feature detect
[PATCH 4/8] x86/intel_rct/mba: Add MBA structures and initialize MBA
[PATCH 5/8] x86/intel_rdt: Prep to add info files for MBA
[PATCH 6/8] x86/intel_rdt/mba: Add info directory files for MBA
[PATCH 7/8] x86/intel_rdt: Prep to add schemata file for MBA
[PATCH 8/8] x86/intel_rdt/mba: Add schemata file support for MBA
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