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Message-ID: <1491401626-31303-1-git-send-email-ldewangan@nvidia.com>
Date:   Wed, 5 Apr 2017 19:43:42 +0530
From:   Laxman Dewangan <ldewangan@...dia.com>
To:     <thierry.reding@...il.com>, <robh+dt@...nel.org>,
        <mark.rutland@....com>
CC:     <jonathanh@...dia.com>, <linux-pwm@...r.kernel.org>,
        <devicetree@...r.kernel.org>, <linux-tegra@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>,
        Laxman Dewangan <ldewangan@...dia.com>
Subject: [PATCH 0/4] pwm: tegra: Pin configuration in suspend/resume and cleanups

This patch series have following fixes:
- Add more precession in PWM period register value calculation
  for lower pwm frequency.
- Add support to configure PWM pins in different state in the
  suspend/resume.

Laxman Dewangan (4):
  pwm: tegra: Use DIV_ROUND_CLOSEST_ULL() instead of local
    implementation
  pwm: tegra: Increase precision in pwm rate calculation
  pwm: tegra: Add DT binding details to configure pin in suspends/resume
  pwm: tegra: Add support to configure pin state in suspends/resume

 .../devicetree/bindings/pwm/nvidia,tegra20-pwm.txt | 43 ++++++++++++
 drivers/pwm/pwm-tegra.c                            | 77 ++++++++++++++++++++--
 2 files changed, 116 insertions(+), 4 deletions(-)

-- 
2.1.4

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