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Message-ID: <d5d2ea5d-2632-86e4-e7e9-ec22694ab997@linux.intel.com>
Date:   Thu, 6 Apr 2017 16:21:06 +0800
From:   "Jin, Yao" <yao.jin@...ux.intel.com>
To:     Peter Zijlstra <peterz@...radead.org>,
        Arnaldo Carvalho de Melo <acme@...nel.org>
Cc:     Jiri Olsa <jolsa@...nel.org>, linux-kernel@...r.kernel.org,
        ak@...ux.intel.com, kan.liang@...el.com, yao.jin@...el.com,
        Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
        Ingo Molnar <mingo@...nel.org>
Subject: Re: [PATCH v1 1/5] perf/core: Define the common branch type
 classification



On 4/6/2017 2:58 PM, Peter Zijlstra wrote:
> On Tue, Apr 04, 2017 at 11:18:05AM -0300, Arnaldo Carvalho de Melo wrote:
>> Adding the perf kernel maintainers to the CC list.
> Thanks.
>
>> Em Fri, Mar 31, 2017 at 11:18:38PM +0800, Jin Yao escreveu:
>>> It is often useful to know the branch types while analyzing branch
>>> data. For example, a call is very different from a conditional branch.
>>>
>>> Currently we have to look it up in binary while the binary may later
>>> not be available and even the binary is available but user has to take
>>> some time. It is very useful for user to check it directly in perf
>>> report.
>>>
>>> Perf already has support for disassembling the branch instruction
>>> to get the branch type. The branch type is defined in lbr.c.
>>>
>>> To keep consistent on kernel and userspace and make the classification
>>> more common, the patch adds the common branch type classification
>>> in perf_event.h.
>>>
>>> Since the disassembling of branch instruction needs some overhead,
>>> a new PERF_SAMPLE_BRANCH_TYPE_SAVE is introduced to indicate if it
>>> needs to disassemble the branch instruction and record the branch
>>> type.
> I don't get it. Why is the kernel interface mucked with for a user-space
> feature?
>
> That's wrong.
Hi, otherwise we have to maintain 2 branch type copies between kernel 
and user-space.

For example, currently X86_BR_* are defined in lbr.c. To display the 
branch type in user-space, the user-space has to maintain the same copy 
for X86_BR_*. I didn't get a better idea.

Thanks
Jin Yao

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