[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Message-Id: <20170407125713.15678-1-andrew@aj.id.au>
Date: Fri, 7 Apr 2017 22:27:09 +0930
From: Andrew Jeffery <andrew@...id.au>
To: Linus Walleij <linus.walleij@...aro.org>
Cc: Andrew Jeffery <andrew@...id.au>, Rob Herring <robh+dt@...nel.org>,
Joel Stanley <joel@....id.au>,
Benjamin Herrenschmidt <benh@...nel.crashing.org>,
linux-gpio@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, openbmc@...ts.ozlabs.org
Subject: [PATCH v2 0/4] pinctrl: aspeed: Add initial pinconf support
Hi Linus,
v2 breaks the pinconf patch for the Aspeed pin controller out into a series,
adding explicit documentation to the devicetree bindings and breaking out
changes to the core from those to the SoC drivers.
The changes also address review comments from Joel.
Cheers,
Andrew
Andrew Jeffery (4):
pinctrl: aspeed: Document pinconf in devicetree bindings
pinctrl: aspeed: Add core pinconf support
pinctrl: aspeed: g4: Add pinconf support
pinctrl: aspeed: g5: Add pinconf support
.../devicetree/bindings/pinctrl/pinctrl-aspeed.txt | 40 +++-
drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c | 117 +++++++++++-
drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c | 153 ++++++++++++++-
drivers/pinctrl/aspeed/pinctrl-aspeed.c | 211 +++++++++++++++++++++
drivers/pinctrl/aspeed/pinctrl-aspeed.h | 28 +++
5 files changed, 538 insertions(+), 11 deletions(-)
--
2.9.3
Powered by blists - more mailing lists