linux-kernel - Re: [PATCH] scsi: mpt3sas: remove redundant wmb on arm/arm64

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Date:   Fri, 7 Apr 2017 13:28:26 -0400
From:   Sinan Kaya <okaya@...eaurora.org>
To:     James Bottomley <jejb@...ux.vnet.ibm.com>,
        linux-scsi@...r.kernel.org, timur@...eaurora.org
Cc:     linux-arm-msm@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org,
        Sathya Prakash <sathya.prakash@...adcom.com>,
        Chaitra P B <chaitra.basappa@...adcom.com>,
        Suganath Prabu Subramani 
        <suganath-prabu.subramani@...adcom.com>,
        "Martin K. Petersen" <martin.petersen@...cle.com>,
        "open list:LSILOGIC MPT FUSION DRIVERS (FC/SAS/SPI)" 
        <MPT-FusionLinux.pdl@...adcom.com>,
        open list <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] scsi: mpt3sas: remove redundant wmb on arm/arm64

On 4/7/2017 1:25 PM, James Bottomley wrote:
>> The right thing was to either call __raw_writel/__raw_readl or
>> write_relaxed/read_relaxed for multi-arch compatibility.
> writeX_relaxed and thus your patch is definitely wrong.  The reason is
> that we have two ordering domains: the CPU and the Bus.  wmb forces
> ordering in the CPU domain but not the bus domain.  writeX originally
> forced ordering in the bus domain but not the CPU domain, but since the
> raw primitives I think it now orders in both and writeX_relaxed orders
> in neither domain, so your patch would currently eliminate the bus
> ordering.

Yeah, that's why I recommended to remove the wmb() with a follow up
instead of using the relaxed with a follow up.

writel already guarantees ordering for both cpu and bus. we don't need
additional wmb()

-- 
Sinan Kaya
Qualcomm Datacenter Technologies, Inc. as an affiliate of Qualcomm Technologies, Inc.
Qualcomm Technologies, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project.