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Message-ID: <1491586851.9118.33.camel@hpe.com>
Date:   Fri, 7 Apr 2017 17:41:02 +0000
From:   "Kani, Toshimitsu" <toshi.kani@....com>
To:     "dan.j.williams@...el.com" <dan.j.williams@...el.com>,
        "linux-nvdimm@...ts.01.org" <linux-nvdimm@...ts.01.org>
CC:     "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "jmoyer@...hat.com" <jmoyer@...hat.com>,
        "tglx@...utronix.de" <tglx@...utronix.de>,
        "hch@....de" <hch@....de>,
        "stable@...r.kernel.org" <stable@...r.kernel.org>,
        "viro@...iv.linux.org.uk" <viro@...iv.linux.org.uk>,
        "x86@...nel.org" <x86@...nel.org>,
        "mawilcox@...rosoft.com" <mawilcox@...rosoft.com>,
        "hpa@...or.com" <hpa@...or.com>,
        "mingo@...hat.com" <mingo@...hat.com>,
        "ross.zwisler@...ux.intel.com" <ross.zwisler@...ux.intel.com>,
        "jack@...e.cz" <jack@...e.cz>
Subject: Re: [PATCH] x86, pmem: fix broken __copy_user_nocache cache-bypass
 assumptions

On Thu, 2017-04-06 at 13:59 -0700, Dan Williams wrote:
> Before we rework the "pmem api" to stop abusing __copy_user_nocache()
> for memcpy_to_pmem() we need to fix cases where we may strand dirty
> data in the cpu cache. The problem occurs when copy_from_iter_pmem()
> is used for arbitrary data transfers from userspace. There is no
> guarantee that these transfers, performed by dax_iomap_actor(), will
> have aligned destinations or aligned transfer lengths. Backstop the
> usage __copy_user_nocache() with explicit cache management in these
> unaligned cases.
> 
> Yes, copy_from_iter_pmem() is now too big for an inline, but
> addressing that is saved for a later patch that moves the entirety of
> the "pmem api" into the pmem driver directly.

The change looks good to me.  Should we also avoid cache flushing in
the case of size=4B & dest aligned by 4B?

Thanks,
-Toshi

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