[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20170410131823.26485-7-kishon@ti.com>
Date: Mon, 10 Apr 2017 18:47:57 +0530
From: Kishon Vijay Abraham I <kishon@...com>
To: <gregkh@...uxfoundation.org>
CC: <kishon@...com>, <linux-kernel@...r.kernel.org>
Subject: [PATCH 06/32] phy: sun4i-usb: add PHYCTL offset for H3 SoC
From: Icenowy Zheng <icenowy@...c.xyz>
The config structure of H3 in phy-sun4i-usb driver have the PHYCTL
register offset missing.
Add it. From the BSP source code, we know that the offset should be
0x10.
Signed-off-by: Icenowy Zheng <icenowy@...c.xyz>
Signed-off-by: Kishon Vijay Abraham I <kishon@...com>
---
drivers/phy/phy-sun4i-usb.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/phy/phy-sun4i-usb.c b/drivers/phy/phy-sun4i-usb.c
index 62b4d25448c6..a650f283f6ff 100644
--- a/drivers/phy/phy-sun4i-usb.c
+++ b/drivers/phy/phy-sun4i-usb.c
@@ -821,6 +821,7 @@ static const struct sun4i_usb_phy_cfg sun8i_h3_cfg = {
.num_phys = 4,
.type = sun8i_h3_phy,
.disc_thresh = 3,
+ .phyctl_offset = REG_PHYCTL_A33,
.dedicated_clocks = true,
.enable_pmu_unk1 = true,
};
--
2.11.0
Powered by blists - more mailing lists