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Date: Mon, 10 Apr 2017 18:42:49 +0200 From: Greg Kroah-Hartman <gregkh@...uxfoundation.org> To: linux-kernel@...r.kernel.org Cc: Greg Kroah-Hartman <gregkh@...uxfoundation.org>, stable@...r.kernel.org, Huacai Chen <chenhc@...ote.com>, John Crispin <john@...ozen.org>, "Steven J . Hill" <Steven.Hill@...iumnetworks.com>, Fuxin Zhang <zhangfx@...ote.com>, Zhangjin Wu <wuzhangjin@...il.com>, linux-mips@...ux-mips.org, Ralf Baechle <ralf@...ux-mips.org> Subject: [PATCH 4.10 058/110] MIPS: Add MIPS_CPU_FTLB for Loongson-3A R2 4.10-stable review patch. If anyone has any objections, please let me know. ------------------ From: Huacai Chen <chenhc@...ote.com> commit 033cffeedbd11c140952b98e8639bf652091a17d upstream. Loongson-3A R2 and newer CPU have FTLB, but Config0.MT is 1, so add MIPS_CPU_FTLB to the CPU options. Signed-off-by: Huacai Chen <chenhc@...ote.com> Cc: John Crispin <john@...ozen.org> Cc: Steven J . Hill <Steven.Hill@...iumnetworks.com> Cc: Fuxin Zhang <zhangfx@...ote.com> Cc: Zhangjin Wu <wuzhangjin@...il.com> Cc: linux-mips@...ux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/15752/ Signed-off-by: Ralf Baechle <ralf@...ux-mips.org> Signed-off-by: Greg Kroah-Hartman <gregkh@...uxfoundation.org> --- arch/mips/kernel/cpu-probe.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) --- a/arch/mips/kernel/cpu-probe.c +++ b/arch/mips/kernel/cpu-probe.c @@ -1824,7 +1824,7 @@ static inline void cpu_probe_loongson(st } decode_configs(c); - c->options |= MIPS_CPU_TLBINV | MIPS_CPU_LDPTE; + c->options |= MIPS_CPU_FTLB | MIPS_CPU_TLBINV | MIPS_CPU_LDPTE; c->writecombine = _CACHE_UNCACHED_ACCELERATED; break; default:
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