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Message-ID: <CAMuHMdX_QAyJTs_M_KUyw=JfP0KuRw+2u5w+eo9AYxBc2BC+sA@mail.gmail.com>
Date: Tue, 11 Apr 2017 11:14:18 +0200
From: Geert Uytterhoeven <geert@...ux-m68k.org>
To: Linus Walleij <linus.walleij@...aro.org>
Cc: Jacopo Mondi <jacopo+renesas@...ndi.org>,
Geert Uytterhoeven <geert+renesas@...der.be>,
Laurent Pinchart <laurent.pinchart@...asonboard.com>,
Chris Brandt <chris.brandt@...esas.com>,
Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Russell King <linux@...linux.org.uk>,
Linux-Renesas <linux-renesas-soc@...r.kernel.org>,
"linux-gpio@...r.kernel.org" <linux-gpio@...r.kernel.org>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v4 0/9] Renesas RZ/A1 pin and gpio controller
Hi Linus,
On Tue, Apr 11, 2017 at 11:05 AM, Linus Walleij
<linus.walleij@...aro.org> wrote:
> On Wed, Apr 5, 2017 at 4:07 PM, Jacopo Mondi <jacopo+renesas@...ndi.org> wrote:
>> Hi Linus,
>> this is 4th round of gpio/pincontroller for RZ/A1 devices.
>>
>> As you suggested in v3 review, I have now added what we called pinmux flags
>> to the list of standard pinconf generic properties, and we're now using
>> generic parsing routines to collect them and apply them when multiplexing
>> pins.
>
> I have merged patch 1/9 so you have the necessary infrastructure in place.
>
> If Geert want to send a pull request based on my devel branch that is fine
> (but a bit late) else the requirements are there for a merge in the early
> v4.12 kernel cycle.
I agree it's a bit late. Will queue for v4.13.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
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