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Message-ID: <20170411133053.stmwmsmjf7ybq42v@art_vandelay>
Date: Tue, 11 Apr 2017 09:30:53 -0400
From: Sean Paul <seanpaul@...omium.org>
To: Jonathan Neuschäfer <j.neuschaefer@....net>
Cc: dri-devel@...ts.freedesktop.org, Dave Airlie <airlied@...hat.com>,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH] drm/udl: Fix unaligned memory access in udl_render_hline
On Fri, Apr 07, 2017 at 10:02:29PM +0200, Jonathan Neuschäfer wrote:
> On SPARC, the udl driver filled my kernel log with these messages:
>
> [186668.910612] Kernel unaligned access at TPC[76609c] udl_render_hline+0x13c/0x3a0
>
> Use put_unaligned_be16 to avoid them. On x86 this results in the same
> code, but on SPARC the compiler emits two single-byte stores.
>
Pushed to drm-misc-fixes with Dave's IRC Ack.
Thanks,
Sean
> Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@....net>
> ---
> drivers/gpu/drm/udl/udl_transfer.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/udl/udl_transfer.c b/drivers/gpu/drm/udl/udl_transfer.c
> index 917dcb978c2c..0c87b1ac6b68 100644
> --- a/drivers/gpu/drm/udl/udl_transfer.c
> +++ b/drivers/gpu/drm/udl/udl_transfer.c
> @@ -14,6 +14,7 @@
> #include <linux/slab.h>
> #include <linux/fb.h>
> #include <linux/prefetch.h>
> +#include <asm/unaligned.h>
>
> #include <drm/drmP.h>
> #include "udl_drv.h"
> @@ -163,7 +164,7 @@ static void udl_compress_hline16(
> const u8 *const start = pixel;
> const uint16_t repeating_pixel_val16 = pixel_val16;
>
> - *(uint16_t *)cmd = cpu_to_be16(pixel_val16);
> + put_unaligned_be16(pixel_val16, cmd);
>
> cmd += 2;
> pixel += bpp;
> --
> 2.11.0
--
Sean Paul, Software Engineer, Google / Chromium OS
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