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Message-ID: <20170411141013.mncuixcmhtgaleov@dell>
Date:   Tue, 11 Apr 2017 15:10:13 +0100
From:   Lee Jones <lee.jones@...aro.org>
To:     Mika Westerberg <mika.westerberg@...ux.intel.com>
Cc:     Peter Tyser <ptyser@...-inc.com>, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] mfd: lpc_ich: Add support for Intel Gemini Lake SoC

On Mon, 10 Apr 2017, Mika Westerberg wrote:

> Like Intel Apollo Lake, Gemini Lake exposes the serial SPI flash device BAR
> through hidden P2SB PCI device. We use the same mechanism than Apollo Lake
> to read the BAR and pass it to the driver.
> 
> Signed-off-by: Mika Westerberg <mika.westerberg@...ux.intel.com>
> ---
>  drivers/mfd/lpc_ich.c | 6 ++++++
>  1 file changed, 6 insertions(+)

Applied, thanks.

> diff --git a/drivers/mfd/lpc_ich.c b/drivers/mfd/lpc_ich.c
> index d98a5d974092..8dca1c5789ab 100644
> --- a/drivers/mfd/lpc_ich.c
> +++ b/drivers/mfd/lpc_ich.c
> @@ -227,6 +227,7 @@ enum lpc_chipsets {
>  	LPC_LEWISBURG,	/* Lewisburg */
>  	LPC_9S,		/* 9 Series */
>  	LPC_APL,	/* Apollo Lake SoC */
> +	LPC_GLK,	/* Gemini Lake SoC */
>  };
>  
>  static struct lpc_ich_info lpc_chipset_info[] = {
> @@ -554,6 +555,10 @@ static struct lpc_ich_info lpc_chipset_info[] = {
>  		.iTCO_version = 5,
>  		.spi_type = INTEL_SPI_BXT,
>  	},
> +	[LPC_GLK] = {
> +		.name = "Gemini Lake SoC",
> +		.spi_type = INTEL_SPI_BXT,
> +	},
>  };
>  
>  /*
> @@ -682,6 +687,7 @@ static const struct pci_device_id lpc_ich_ids[] = {
>  	{ PCI_VDEVICE(INTEL, 0x2917), LPC_ICH9ME},
>  	{ PCI_VDEVICE(INTEL, 0x2918), LPC_ICH9},
>  	{ PCI_VDEVICE(INTEL, 0x2919), LPC_ICH9M},
> +	{ PCI_VDEVICE(INTEL, 0x3197), LPC_GLK},
>  	{ PCI_VDEVICE(INTEL, 0x3a14), LPC_ICH10DO},
>  	{ PCI_VDEVICE(INTEL, 0x3a16), LPC_ICH10R},
>  	{ PCI_VDEVICE(INTEL, 0x3a18), LPC_ICH10},

-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
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