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Date:   Tue, 11 Apr 2017 19:54:29 -0400 (EDT)
From:   Paolo Bonzini <pbonzini@...hat.com>
To:     Bandan Das <bsd@...hat.com>
Cc:     linux-kernel@...r.kernel.org, kvm@...r.kernel.org, david@...hat.com
Subject: Re: [PATCH 4/6] kvm: nVMX: support EPT accessed/dirty bits



----- Original Message -----
> From: "Bandan Das" <bsd@...hat.com>
> To: "Paolo Bonzini" <pbonzini@...hat.com>
> Cc: linux-kernel@...r.kernel.org, kvm@...r.kernel.org, david@...hat.com
> Sent: Wednesday, April 12, 2017 7:35:16 AM
> Subject: Re: [PATCH 4/6] kvm: nVMX: support EPT accessed/dirty bits
> 
> Paolo Bonzini <pbonzini@...hat.com> writes:
> ...
> >  	accessed_dirty = have_ad ? PT_GUEST_ACCESSED_MASK : 0;
> > +
> > +	/*
> > +	 * FIXME: on Intel processors, loads of the PDPTE registers for PAE
> > paging
> > +	 * by the MOV to CR instruction are treated as reads and do not cause the
> > +	 * processor to set the dirty flag in tany EPT paging-structure entry.
> > +	 */
> 
> Minor typo: "in any EPT paging-structure entry".
> 
> > +	nested_access = (have_ad ? PFERR_WRITE_MASK : 0) | PFERR_USER_MASK;
> > +
> >  	pt_access = pte_access = ACC_ALL;
> >  	++walker->level;
> >  
> > @@ -338,7 +337,7 @@ static int FNAME(walk_addr_generic)(struct guest_walker
> > *walker,
> >  		walker->pte_gpa[walker->level - 1] = pte_gpa;
> >  
> >  		real_gfn = mmu->translate_gpa(vcpu, gfn_to_gpa(table_gfn),
> > -					      PFERR_USER_MASK|PFERR_WRITE_MASK,
> > +					      nested_access,
> >  					      &walker->fault);
> 
> I can't seem to understand the significance of this change (or for that
> matter what was before this change).
> 
> mmu->translate_gpa() just returns gfn_to_gpa(table_gfn), right ?

For EPT it is, you're right it's fishy.  The "nested_access" should be
computed in translate_nested_gpa, which is where kvm->arch.nested_mmu
(non-EPT) requests to access kvm->arch.mmu (EPT).

In practice we need to define a new function
vcpu->arch.mmu.gva_to_gpa_nested that computes the nested_access
and calls cpu->arch.mmu.gva_to_gpa.

Thanks,

Paolo

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