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Message-Id: <1491981044-24635-2-git-send-email-kever.yang@rock-chips.com>
Date:   Wed, 12 Apr 2017 15:10:42 +0800
From:   Kever Yang <kever.yang@...k-chips.com>
To:     heiko@...ech.de
Cc:     linux-rockchip@...ts.infradead.org,
        Kever Yang <kever.yang@...k-chips.com>,
        devicetree@...r.kernel.org, David Wu <david.wu@...k-chips.com>,
        Caesar Wang <wxt@...k-chips.com>,
        Elaine Zhang <zhangqing@...k-chips.com>,
        Brian Norris <briannorris@...omium.org>,
        linux-kernel@...r.kernel.org, Shawn Lin <shawn.lin@...k-chips.com>,
        Douglas Anderson <dianders@...omium.org>,
        Will Deacon <will.deacon@....com>,
        Jianqun Xu <jay.xu@...k-chips.com>,
        Mark Rutland <mark.rutland@....com>,
        Rob Herring <robh+dt@...nel.org>,
        Catalin Marinas <catalin.marinas@....com>,
        linux-arm-kernel@...ts.infradead.org
Subject: [PATCH 2/4] arm64: dts: rk3399: add power domain for some peripheral

Add power domain for sd, usb, edp.

Signed-off-by: Kever Yang <kever.yang@...k-chips.com>
---

 arch/arm64/boot/dts/rockchip/rk3399.dtsi | 36 +++++++++++++++++++++++++++-----
 1 file changed, 31 insertions(+), 5 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 387ae34..9d44c19 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -947,6 +947,10 @@
 			};
 
 			/* These power domains are grouped by VD_LOGIC */
+			pd_edp@...399_PD_EDP {
+				reg = <RK3399_PD_EDP>;
+				clocks = <&cru PCLK_EDP_CTRL>;
+			};
 			pd_emmc@...399_PD_EMMC {
 				reg = <RK3399_PD_EMMC>;
 				clocks = <&cru ACLK_EMMC>;
@@ -958,11 +962,33 @@
 					 <&cru PCLK_GMAC>;
 				pm_qos = <&qos_gmac>;
 			};
-			pd_sd@...399_PD_SD {
-				reg = <RK3399_PD_SD>;
-				clocks = <&cru HCLK_SDMMC>,
-					 <&cru SCLK_SDMMC>;
-				pm_qos = <&qos_sd>;
+			pd_perihp@...399_PD_PERIHP {
+				reg = <RK3399_PD_PERIHP>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				clocks = <&cru ACLK_PERIHP>;
+				pm_qos = <&qos_perihp>,
+					 <&qos_pcie>,
+					 <&qos_usb_host0>,
+					 <&qos_usb_host1>;
+
+				pd_sd@...399_PD_SD {
+					reg = <RK3399_PD_SD>;
+					clocks = <&cru HCLK_SDMMC>,
+						 <&cru SCLK_SDMMC>;
+					pm_qos = <&qos_sd>;
+				};
+			};
+			pd_sdioaudio@...399_PD_SDIOAUDIO {
+				reg = <RK3399_PD_SDIOAUDIO>;
+				clocks = <&cru HCLK_SDIO>;
+				pm_qos = <&qos_sdioaudio>;
+			};
+			pd_usb3@...399_PD_USB3 {
+				reg = <RK3399_PD_USB3>;
+				clocks = <&cru ACLK_USB3>;
+				pm_qos = <&qos_usb_otg0>,
+					 <&qos_usb_otg1>;
 			};
 			pd_vio@...399_PD_VIO {
 				reg = <RK3399_PD_VIO>;
-- 
1.9.1

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