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Message-ID: <1492066545.4624.52.camel@neuling.org>
Date: Thu, 13 Apr 2017 16:55:45 +1000
From: Michael Neuling <mikey@...ling.org>
To: "Gautham R. Shenoy" <ego@...ux.vnet.ibm.com>,
Michael Ellerman <mpe@...erman.id.au>,
Benjamin Herrenschmidt <benh@...nel.crashing.org>,
"Shreyas B. Prabhu" <shreyasbp@...il.com>,
Shilpasri G Bhat <shilpa.bhat@...ux.vnet.ibm.com>,
Vaidyanathan Srinivasan <svaidy@...ux.vnet.ibm.com>,
Anton Blanchard <anton@...ba.org>,
Balbir Singh <bsingharora@...il.com>,
Akshay Adiga <akshay.adiga@...ux.vnet.ibm.com>,
Nicholas Piggin <npiggin@...il.com>,
Mahesh J Salgaonkar <mahesh@...ux.vnet.ibm.com>,
"Aneesh Kumar K.V" <aneesh.kumar@...ux.vnet.ibm.com>
Cc: linuxppc-dev@...ts.ozlabs.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 2/3] powernv:idle: Decouple TB restore & Per-core SPRs
restore
On Wed, 2017-04-12 at 17:16 +0530, Gautham R. Shenoy wrote:
> From: "Gautham R. Shenoy" <ego@...ux.vnet.ibm.com>
>
> The idle-exit code assumes that if Timebase is not lost, then neither
> are the per-core hypervisor resources lost.
Double negative! How about:
The idle-exit code assumes that if the timebase is restored, then the
per-core hypervisor resources are also restored.
> This was true on POWER8
> where fast-sleep lost only TB but not per-core resources, and winkle
> lost both.
>
> This assumption is not true for POWER9 however, since there can be
> states which do not lose timebase but can lose per-core SPRs.
>
> Hence check if we need to restore the per-core hypervisor state even
> if timebase is not lost.
I think I understand what you're doing, just seems awkwardly worded.
Is this actually what the patch is doing? It seem to be just changing one
branch.
Mikey
>
> Signed-off-by: Gautham R. Shenoy <ego@...ux.vnet.ibm.com>
> ---
> arch/powerpc/kernel/idle_book3s.S | 7 ++++---
> 1 file changed, 4 insertions(+), 3 deletions(-)
>
> diff --git a/arch/powerpc/kernel/idle_book3s.S
> b/arch/powerpc/kernel/idle_book3s.S
> index 9b747e9..6a9bd28 100644
> --- a/arch/powerpc/kernel/idle_book3s.S
> +++ b/arch/powerpc/kernel/idle_book3s.S
> @@ -723,13 +723,14 @@ timebase_resync:
> * Use cr3 which indicates that we are waking up with atleast partial
> * hypervisor state loss to determine if TIMEBASE RESYNC is needed.
> */
> - ble cr3,clear_lock
> + ble cr3,.Ltb_resynced
> /* Time base re-sync */
> bl opal_resync_timebase;
> /*
> - * If waking up from sleep, per core state is not lost, skip to
> - * clear_lock.
> + * If waking up from sleep (POWER8), per core state
> + * is not lost, skip to clear_lock.
> */
> +.Ltb_resynced:
> blt cr4,clear_lock
>
> /*
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