lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  PHC 
Open Source and information security mailing list archives
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Thu, 13 Apr 2017 20:00:47 +1000
From:   Michael Ellerman <>
To:     Michael Neuling <>,
        "Gautham R. Shenoy" <>,
        Benjamin Herrenschmidt <>,
        "Shreyas B. Prabhu" <>,
        Shilpasri G Bhat <>,
        Vaidyanathan Srinivasan <>,
        Anton Blanchard <>,
        Balbir Singh <>,
        Akshay Adiga <>,
        Nicholas Piggin <>,
        Mahesh J Salgaonkar <>,
        "Aneesh Kumar K.V" <>
Subject: Re: [PATCH 1/3] powernv:idle: Use correct IDLE_THREAD_BITS in POWER8/9

Michael Neuling <> writes:

> On Wed, 2017-04-12 at 17:16 +0530, Gautham R. Shenoy wrote:
>> From: "Gautham R. Shenoy" <>
>> This patch ensures that POWER8 and POWER9 processors use the correct
>> value of IDLE_THREAD_BITS as POWER8 has 8 threads per core and hence
>> the IDLE_THREAD_BITS should be 0xFF while POWER9 has only 4 threads
>> per core and hence the IDLE_THREAD_BITS should be 0xF.
> Why don't we derive this from the device tree rather than hard wiring it per cpu
> type?


In fact we already have threads_per_core which is exactly that.


Powered by blists - more mailing lists