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Message-ID: <tip-c6ea67de52c29a8b45e5fc7569fc4336bfd557b0@git.kernel.org>
Date: Fri, 14 Apr 2017 07:21:23 -0700
From: tip-bot for Vikas Shivappa <tipbot@...or.com>
To: linux-tip-commits@...r.kernel.org
Cc: mingo@...nel.org, linux-kernel@...r.kernel.org, tglx@...utronix.de,
vikas.shivappa@...ux.intel.com, hpa@...or.com
Subject: [tip:x86/cpu] x86/intel_rdt: Make schemata file parsers resource
specific
Commit-ID: c6ea67de52c29a8b45e5fc7569fc4336bfd557b0
Gitweb: http://git.kernel.org/tip/c6ea67de52c29a8b45e5fc7569fc4336bfd557b0
Author: Vikas Shivappa <vikas.shivappa@...ux.intel.com>
AuthorDate: Fri, 7 Apr 2017 17:33:56 -0700
Committer: Thomas Gleixner <tglx@...utronix.de>
CommitDate: Fri, 14 Apr 2017 16:10:09 +0200
x86/intel_rdt: Make schemata file parsers resource specific
The schemata files are the user space interface to update resource
controls. The parser is hardwired to support only cache resources, which do
not fit the requirements of memory resources.
Add a function pointer for a parser to the struct rdt_resource and switch
the cache parsing over.
[ tglx: Massaged changelog ]
Signed-off-by: Vikas Shivappa <vikas.shivappa@...ux.intel.com>
Cc: ravi.v.shankar@...el.com
Cc: tony.luck@...el.com
Cc: fenghua.yu@...el.com
Cc: vikas.shivappa@...el.com
Link: http://lkml.kernel.org/r/1491611637-20417-8-git-send-email-vikas.shivappa@linux.intel.com
Signed-off-by: Thomas Gleixner <tglx@...utronix.de>
---
arch/x86/include/asm/intel_rdt.h | 6 ++++++
arch/x86/kernel/cpu/intel_rdt.c | 8 ++++++++
arch/x86/kernel/cpu/intel_rdt_schemata.c | 31 +++++++++++++++++--------------
3 files changed, 31 insertions(+), 14 deletions(-)
diff --git a/arch/x86/include/asm/intel_rdt.h b/arch/x86/include/asm/intel_rdt.h
index 167fe10..4a90057 100644
--- a/arch/x86/include/asm/intel_rdt.h
+++ b/arch/x86/include/asm/intel_rdt.h
@@ -152,6 +152,8 @@ struct rdt_membw {
* @cache: Cache allocation related data
* @info_files: resctrl info files for the resource
* @nr_info_files: Number of info files
+ * @format_str: Per resource format string to show domain value
+ * @parse_ctrlval: Per resource function pointer to parse control values
*/
struct rdt_resource {
bool enabled;
@@ -171,10 +173,14 @@ struct rdt_resource {
};
struct rftype *info_files;
int nr_info_files;
+ const char *format_str;
+ int (*parse_ctrlval) (char *buf, struct rdt_resource *r,
+ struct rdt_domain *d);
};
void rdt_get_cache_infofile(struct rdt_resource *r);
void rdt_get_mba_infofile(struct rdt_resource *r);
+int parse_cbm(char *buf, struct rdt_resource *r, struct rdt_domain *d);
extern struct mutex rdtgroup_mutex;
diff --git a/arch/x86/kernel/cpu/intel_rdt.c b/arch/x86/kernel/cpu/intel_rdt.c
index 438efef..1e410ea 100644
--- a/arch/x86/kernel/cpu/intel_rdt.c
+++ b/arch/x86/kernel/cpu/intel_rdt.c
@@ -65,6 +65,8 @@ struct rdt_resource rdt_resources_all[] = {
.cbm_idx_mult = 1,
.cbm_idx_offset = 0,
},
+ .parse_ctrlval = parse_cbm,
+ .format_str = "%d=%0*x",
},
{
.name = "L3DATA",
@@ -77,6 +79,8 @@ struct rdt_resource rdt_resources_all[] = {
.cbm_idx_mult = 2,
.cbm_idx_offset = 0,
},
+ .parse_ctrlval = parse_cbm,
+ .format_str = "%d=%0*x",
},
{
.name = "L3CODE",
@@ -89,6 +93,8 @@ struct rdt_resource rdt_resources_all[] = {
.cbm_idx_mult = 2,
.cbm_idx_offset = 1,
},
+ .parse_ctrlval = parse_cbm,
+ .format_str = "%d=%0*x",
},
{
.name = "L2",
@@ -101,6 +107,8 @@ struct rdt_resource rdt_resources_all[] = {
.cbm_idx_mult = 1,
.cbm_idx_offset = 0,
},
+ .parse_ctrlval = parse_cbm,
+ .format_str = "%d=%0*x",
},
{
.name = "MB",
diff --git a/arch/x86/kernel/cpu/intel_rdt_schemata.c b/arch/x86/kernel/cpu/intel_rdt_schemata.c
index 5097ac6..c72c9cc 100644
--- a/arch/x86/kernel/cpu/intel_rdt_schemata.c
+++ b/arch/x86/kernel/cpu/intel_rdt_schemata.c
@@ -34,22 +34,29 @@
* are allowed (e.g. FFFFH, 0FF0H, 003CH, etc.).
* Additionally Haswell requires at least two bits set.
*/
-static bool cbm_validate(unsigned long var, struct rdt_resource *r)
+static bool cbm_validate(char *buf, unsigned long *data, struct rdt_resource *r)
{
- unsigned long first_bit, zero_bit;
+ unsigned long first_bit, zero_bit, val;
unsigned int cbm_len = r->cache.cbm_len;
+ int ret;
+
+ ret = kstrtoul(buf, 16, &val);
+ if (ret)
+ return false;
- if (var == 0 || var > r->default_ctrl)
+ if (val == 0 || val > r->default_ctrl)
return false;
- first_bit = find_first_bit(&var, cbm_len);
- zero_bit = find_next_zero_bit(&var, cbm_len, first_bit);
+ first_bit = find_first_bit(&val, cbm_len);
+ zero_bit = find_next_zero_bit(&val, cbm_len, first_bit);
- if (find_next_bit(&var, cbm_len, zero_bit) < cbm_len)
+ if (find_next_bit(&val, cbm_len, zero_bit) < cbm_len)
return false;
if ((zero_bit - first_bit) < r->cache.min_cbm_bits)
return false;
+
+ *data = val;
return true;
}
@@ -57,18 +64,14 @@ static bool cbm_validate(unsigned long var, struct rdt_resource *r)
* Read one cache bit mask (hex). Check that it is valid for the current
* resource type.
*/
-static int parse_cbm(char *buf, struct rdt_resource *r, struct rdt_domain *d)
+int parse_cbm(char *buf, struct rdt_resource *r, struct rdt_domain *d)
{
unsigned long data;
- int ret;
if (d->have_new_ctrl)
return -EINVAL;
- ret = kstrtoul(buf, 16, &data);
- if (ret)
- return ret;
- if (!cbm_validate(data, r))
+ if(!cbm_validate(buf, &data, r))
return -EINVAL;
d->new_ctrl = data;
d->have_new_ctrl = true;
@@ -97,7 +100,7 @@ next:
return -EINVAL;
list_for_each_entry(d, &r->domains, list) {
if (d->id == dom_id) {
- if (parse_cbm(dom, r, d))
+ if (r->parse_ctrlval(dom, r, d))
return -EINVAL;
goto next;
}
@@ -208,7 +211,7 @@ static void show_doms(struct seq_file *s, struct rdt_resource *r, int closid)
list_for_each_entry(dom, &r->domains, list) {
if (sep)
seq_puts(s, ";");
- seq_printf(s, "%d=%0*x", dom->id, max_data_width,
+ seq_printf(s, r->format_str, dom->id, max_data_width,
dom->ctrl_val[closid]);
sep = true;
}
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