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Message-Id: <20170417115747.7300-4-icenowy@aosc.io>
Date:   Mon, 17 Apr 2017 19:57:38 +0800
From:   Icenowy Zheng <icenowy@...c.io>
To:     Lee Jones <lee.jones@...aro.org>, Rob Herring <robh+dt@...nel.org>,
        Chen-Yu Tsai <wens@...e.org>,
        Maxime Ripard <maxime.ripard@...e-electrons.com>,
        Liam Girdwood <lgirdwood@...il.com>,
        Mark Brown <broonie@...nel.org>
Cc:     devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org, linux-sunxi@...glegroups.com,
        Icenowy Zheng <icenowy@...c.io>
Subject: [PATCH v3 03/12] dt-bindings: make AXP20X compatible strings one per line

In the binding documentation of AXP20X mfd, the compatible strings used
to be listed for three per line, which leads to some mess when trying to
add AXP803 compatible string (as we have already AXP806 and AXP809
compatibles, which is after AXP803 in ascending order).

Make the compatible strings one per line, so that inserting a new
compatible string will be directly a new line.

Signed-off-by: Icenowy Zheng <icenowy@...c.io>
---
New patch in v3.

 Documentation/devicetree/bindings/mfd/axp20x.txt | 11 ++++++++---
 1 file changed, 8 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/mfd/axp20x.txt b/Documentation/devicetree/bindings/mfd/axp20x.txt
index b41d2601c6ba..a3e813f6060a 100644
--- a/Documentation/devicetree/bindings/mfd/axp20x.txt
+++ b/Documentation/devicetree/bindings/mfd/axp20x.txt
@@ -9,9 +9,14 @@ axp223 (X-Powers)
 axp809 (X-Powers)
 
 Required properties:
-- compatible: "x-powers,axp152", "x-powers,axp202", "x-powers,axp209",
-	      "x-powers,axp221", "x-powers,axp223", "x-powers,axp806",
-	      "x-powers,axp809"
+- compatible: should be one of:
+    * "x-powers,axp152"
+    * "x-powers,axp202"
+    * "x-powers,axp209"
+    * "x-powers,axp221"
+    * "x-powers,axp223"
+    * "x-powers,axp806"
+    * "x-powers,axp809"
 - reg: The I2C slave address or RSB hardware address for the AXP chip
 - interrupt-parent: The parent interrupt controller
 - interrupts: SoC NMI / GPIO interrupt connected to the PMIC's IRQ pin
-- 
2.12.2

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