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Message-ID: <9065477a-6c2b-4566-a3c8-4d47a62e52a7@US01WEHTC2.internal.synopsys.com>
Date: Wed, 19 Apr 2017 14:49:03 +0400
From: Razmik Karapetyan <Razmik.Karapetyan@...opsys.com>
To: John Youn <John.Youn@...opsys.com>,
Felipe Balbi <balbi@...nel.org>,
"Greg Kroah-Hartman" <gregkh@...uxfoundation.org>,
<linux-usb@...r.kernel.org>, <linux-kernel@...r.kernel.org>
CC: Razmik Karapetyan <Razmik.Karapetyan@...opsys.com>
Subject: [PATCH 2/3] usb: dwc2: Define Active Clock Gating support bit in GHWCFG4
The previously reserved 12th bit in GHWCFG4 now indicates that the
controller supports the Dynamic Power Reduction (Active Clock Gating)
during no traffic scenarios such as L0, idle, resume and suspend
states.
Signed-off-by: Razmik Karapetyan <razmik@...opsys.com>
---
drivers/usb/dwc2/hw.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/usb/dwc2/hw.h b/drivers/usb/dwc2/hw.h
index b726701..0f7806c 100644
--- a/drivers/usb/dwc2/hw.h
+++ b/drivers/usb/dwc2/hw.h
@@ -308,6 +308,7 @@
#define GHWCFG4_NUM_DEV_MODE_CTRL_EP_SHIFT 16
#define GHWCFG4_UTMI_PHY_DATA_WIDTH_MASK (0x3 << 14)
#define GHWCFG4_UTMI_PHY_DATA_WIDTH_SHIFT 14
+#define GHWCFG4_ACG_SUPPORTED BIT(12)
#define GHWCFG4_UTMI_PHY_DATA_WIDTH_8 0
#define GHWCFG4_UTMI_PHY_DATA_WIDTH_16 1
#define GHWCFG4_UTMI_PHY_DATA_WIDTH_8_OR_16 2
--
2.7.4
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