lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20170420103340.GA755@e104818-lin.cambridge.arm.com>
Date:   Thu, 20 Apr 2017 11:33:40 +0100
From:   Catalin Marinas <catalin.marinas@....com>
To:     Lorenzo Pieralisi <lorenzo.pieralisi@....com>
Cc:     linux-pci@...r.kernel.org, Wenrui Li <wenrui.li@...k-chips.com>,
        Gabriele Paoloni <gabriele.paoloni@...wei.com>,
        Shawn Lin <shawn.lin@...k-chips.com>,
        Will Deacon <will.deacon@....com>,
        Michal Simek <michal.simek@...inx.com>,
        Thierry Reding <thierry.reding@...il.com>,
        Tanmay Inamdar <tinamdar@....com>,
        Pratyush Anand <pratyush.anand@...il.com>,
        Russell King <linux@...linux.org.uk>,
        Jon Mason <jonmason@...adcom.com>,
        Murali Karicheri <m-karicheri2@...com>,
        Benjamin Herrenschmidt <benh@...nel.crashing.org>,
        Arnd Bergmann <arnd@...db.de>,
        Bharat Kumar Gogada <bharat.kumar.gogada@...inx.com>,
        Ray Jui <rjui@...adcom.com>,
        John Garry <john.garry@...wei.com>,
        Joao Pinto <Joao.Pinto@...opsys.com>,
        Bjorn Helgaas <bhelgaas@...gle.com>,
        Mingkai Hu <mingkai.hu@...escale.com>,
        linux-arm-kernel@...ts.infradead.org,
        "Luis R. Rodriguez" <mcgrof@...nel.org>,
        Thomas Petazzoni <thomas.petazzoni@...e-electrons.com>,
        Jingoo Han <jingoohan1@...il.com>,
        linux-kernel@...r.kernel.org,
        Stanimir Varbanov <svarbanov@...sol.com>,
        Minghuan Lian <minghuan.Lian@...escale.com>,
        Zhou Wang <wangzhou1@...ilicon.com>,
        Roy Zang <tie-fei.zang@...escale.com>
Subject: Re: [PATCH v4 03/21] ARM64: implement pci_remap_cfgspace() interface

On Wed, Apr 19, 2017 at 05:48:52PM +0100, Lorenzo Pieralisi wrote:
> The PCI bus specifications (rev 3.0, 3.2.5 "Transaction Ordering
> and Posting") defines rules for PCI configuration space transactions
> ordering and posting, that state that configuration writes
> are non-posted transactions.
> 
> This rule is reinforced by the ARM v8 architecture reference manual
> (issue A.k, Early Write Acknowledgment) that explicitly recommends
> that No Early Write Acknowledgment attribute should be used to map
> PCI configuration (write) transactions.
> 
> Current ioremap interface on ARM64 implements mapping functions
> where the Early Write Acknowledgment hint is enabled, so they
> cannot be used to map PCI configuration space in a PCI specs
> compliant way.
> 
> Implement an ARM64 specific pci_remap_cfgspace() interface
> that allows to map PCI config region with nGnRnE attributes, providing
> a remap function that complies with PCI specifications and the ARMv8
> architecture reference manual recommendations.
> 
> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@....com>
> Cc: Will Deacon <will.deacon@....com>
> Cc: Catalin Marinas <catalin.marinas@....com>

Acked-by: Catalin Marinas <catalin.marinas@....com>

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ