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Message-Id: <1492724581-17034-1-git-send-email-agust@denx.de>
Date:   Thu, 20 Apr 2017 23:43:01 +0200
From:   Anatolij Gustschin <agust@...x.de>
To:     linux-fpga@...r.kernel.org
Cc:     Alan Tull <atull@...nel.org>,
        Moritz Fischer <moritz.fischer@...us.com>,
        linux-kernel@...r.kernel.org,
        Joshua Clayton <stillcompiling@...il.com>
Subject: [PATCH] fpga: Add flag to indicate SPI bitstream is bit-reversed

Add a flag that is passed to the write_init() callback,
indicating that the SPI bitstream starts with LSB first.
SPI controllers usually send data with MSB first. If an
FPGA expects bitstream data as LSB first, the data must
be reversed either by the SPI controller or by the driver.

Alternatively the bitstream could be prepared as bit-reversed
to avoid the bit-swapping while sending. This flag indicates
such bit-reversed SPI bitstream. The low-level driver will
deal with the flag and perform bit-reversing if needed.

Signed-off-by: Anatolij Gustschin <agust@...x.de>
---
 include/linux/fpga/fpga-mgr.h | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/include/linux/fpga/fpga-mgr.h b/include/linux/fpga/fpga-mgr.h
index b4ac24c..5a055a0 100644
--- a/include/linux/fpga/fpga-mgr.h
+++ b/include/linux/fpga/fpga-mgr.h
@@ -67,10 +67,13 @@ enum fpga_mgr_states {
  * FPGA Manager flags
  * FPGA_MGR_PARTIAL_RECONFIG: do partial reconfiguration if supported
  * FPGA_MGR_EXTERNAL_CONFIG: FPGA has been configured prior to Linux booting
+ * FPGA_MGR_SPI_BITSTREAM_LSB_FIRST: SPI bitstream bit order is reversed to
+ *				     start with LSB first
  */
 #define FPGA_MGR_PARTIAL_RECONFIG	BIT(0)
 #define FPGA_MGR_EXTERNAL_CONFIG	BIT(1)
 #define FPGA_MGR_ENCRYPTED_BITSTREAM	BIT(2)
+#define FPGA_MGR_SPI_BITSTREAM_LSB_FIRST	BIT(3)
 
 /**
  * struct fpga_image_info - information specific to a FPGA image
-- 
2.7.4

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