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Message-ID: <CAK=zhgpmcmq-CnWuU9=WRJpAaEduw63LSPLE9yZzF_sUHkM4AA@mail.gmail.com>
Date: Fri, 21 Apr 2017 13:26:29 +0530
From: Sreekanth Reddy <sreekanth.reddy@...adcom.com>
To: "Martin K. Petersen" <martin.petersen@...cle.com>
Cc: Sinan Kaya <okaya@...eaurora.org>,
"linux-scsi@...r.kernel.org" <linux-scsi@...r.kernel.org>,
timur@...eaurora.org, linux-arm-msm@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
Sathya Prakash <sathya.prakash@...adcom.com>,
Chaitra P B <chaitra.basappa@...adcom.com>,
Suganath Prabu Subramani
<suganath-prabu.subramani@...adcom.com>,
"James E.J. Bottomley" <jejb@...ux.vnet.ibm.com>,
"open list:LSILOGIC MPT FUSION DRIVERS (FC/SAS/SPI)"
<MPT-FusionLinux.pdl@...adcom.com>,
open list <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH V2] scsi: mpt3sas: remove redundant wmb
On Thu, Apr 20, 2017 at 7:58 AM, Martin K. Petersen
<martin.petersen@...cle.com> wrote:
> Sinan Kaya <okaya@...eaurora.org> writes:
>
>> Due to relaxed ordering requirements on multiple architectures,
>> drivers are required to use wmb/rmb/mb combinations when they need to
>> guarantee observability between the memory and the HW.
>>
>> The mpt3sas driver is already using wmb() for this purpose. However,
>> it issues a writel following wmb(). writel() function on arm/arm64
>> arhictectures have an embedded wmb() call inside.
[Sreekanth] Whether same thing applicable for SPARC & POWER
architectures. If yes then we are fine with this patch changes.
>>
>> This results in unnecessary performance loss and code duplication.
>>
>> writel already guarantees ordering for both cpu and bus. we don't need
>> additional wmb()
>
> Broadcom folks, please review!
>
> --
> Martin K. Petersen Oracle Linux Engineering
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