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Message-ID: <20170421011254.GA705@lunn.ch>
Date: Fri, 21 Apr 2017 03:12:54 +0200
From: Andrew Lunn <andrew@...n.ch>
To: Roger Quadros <rogerq@...com>
Cc: davem@...emloft.net, Florian Fainelli <f.fainelli@...il.com>,
tony@...mide.com, nsekhar@...com, jsarha@...com,
netdev@...r.kernel.org, linux-omap@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 net-next] mdio_bus: Issue GPIO RESET to PHYs.
On Thu, Apr 20, 2017 at 05:11:53PM +0300, Roger Quadros wrote:
> Some boards [1] leave the PHYs at an invalid state
> during system power-up or reset thus causing unreliability
> issues with the PHY which manifests as PHY not being detected
> or link not functional. To fix this, these PHYs need to be RESET
> via a GPIO connected to the PHY's RESET pin.
>
> Some boards have a single GPIO controlling the PHY RESET pin of all
> PHYs on the bus whereas some others have separate GPIOs controlling
> individual PHY RESETs.
>
> In both cases, the RESET de-assertion cannot be done in the PHY driver
> as the PHY will not probe till its reset is de-asserted.
> So do the RESET de-assertion in the MDIO bus driver.
>
> [1] - am572x-idk, am571x-idk, a437x-idk
>
> Signed-off-by: Roger Quadros <rogerq@...com>
Hi Roger
Thanks for doing a generic solutions and the MDIO DT documentation.
Reviewed-by: Andrew Lunn <andrew@...n.ch>
Andrew
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