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Message-ID: <92EBB4272BF81E4089A7126EC1E7B2846676CC01@IRSMSX101.ger.corp.intel.com>
Date:   Fri, 21 Apr 2017 14:13:42 +0000
From:   "Patel, Mayurkumar" <mayurkumar.patel@...el.com>
To:     Sinan Kaya <okaya@...eaurora.org>,
        Bjorn Helgaas <bhelgaas@...gle.com>
CC:     Bjorn Helgaas <helgaas@...nel.org>,
        Rajat Jain <rajatja@...gle.com>,
        "Rajat Jain" <rajatxjain@...il.com>,
        David Daney <david.daney@...ium.com>,
        "linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
        Timur Tabi <timur@...eaurora.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        Julia Lawall <Julia.Lawall@...6.fr>,
        linux-arm-msm <linux-arm-msm@...r.kernel.org>,
        Yinghai Lu <yinghai@...nel.org>,
        Shawn Lin <shawn.lin@...k-chips.com>,
        linux-arm <linux-arm-kernel@...ts.infradead.org>,
        Myron Stowe <myron.stowe@...hat.com>
Subject: RE: [PATCH V8 4/5] PCI/ASPM: save power on values during bridge init

>
>On 4/21/2017 3:46 AM, Patel, Mayurkumar wrote:
>> If we want to follow above approach then shall we consider having something similar as following?
>
>Do you see this problem if you boot with pcie_aspm.policy=powersave option?
>

No problems. with pcie_aspm.policy=powersave(L1SS are not enabled in this case
but L1 stays ok all the time after many Power(hotplug) cycles but I think that is expected with this policy)
and pcie_aspm.policy=powersupersave (L1/L1SS both stays ok all the time).

>
>--
>Sinan Kaya
>Qualcomm Datacenter Technologies, Inc. as an affiliate of Qualcomm Technologies, Inc.
>Qualcomm Technologies, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project.
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