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Message-ID: <CANwerB3CySDKDF0Q5g4h5yaKBEF2S_rmp8ikR2HgGyf+RXzgAQ@mail.gmail.com>
Date: Sun, 23 Apr 2017 00:46:24 +1000
From: Jonathan Liu <net147@...il.com>
To: plaes@...es.org
Cc: linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
devicetree <devicetree@...r.kernel.org>,
linux-clk@...r.kernel.org,
linux-sunxi <linux-sunxi@...glegroups.com>,
Icenowy Zheng <icenowy@...c.xyz>,
Russell King <linux@...linux.org.uk>,
Chen-Yu Tsai <wens@...e.org>,
Maxime Ripard <maxime.ripard@...e-electrons.com>,
Mark Rutland <mark.rutland@....com>,
Rob Herring <robh+dt@...nel.org>,
Stephen Boyd <sboyd@...eaurora.org>,
Michael Turquette <mturquette@...libre.com>,
Philipp Zabel <p.zabel@...gutronix.de>
Subject: Re: [linux-sunxi] [PATCH v2 1/6] clk: sunxi-ng: Add sun4i/sun7i CCU driver
Hi Priit,
On 27 March 2017 at 04:20, Priit Laes <plaes@...es.org> wrote:
> +static struct ccu_nkmp pll_ve_clk = {
> + .enable = BIT(31),
> + .n = _SUNXI_CCU_MULT_OFFSET(8, 5, 0),
> + .k = _SUNXI_CCU_MULT(4, 2),
> + .m = _SUNXI_CCU_DIV(0, 2),
> + .p = _SUNXI_CCU_DIV(16, 2),
> + .common = {
> + .reg = 0x018,
> + .hw.init = CLK_HW_INIT("pll-ve",
> + "hosc",
> + &ccu_nkmp_ops,
> + 0),
> + },
> +};
pll-ve is a NKMP clock in A10 but a NK clock in A20.
> +static const char *const hdmi_parents[] = { "pll-video0", "pll-video0-2x",
> + "pll-vide01", "pll-video1-2x" };
"pll-vide01" should be "pll-video1".
Regards,
Jonathan
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