lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <1493044041.24567.166.camel@linux.intel.com>
Date:   Mon, 24 Apr 2017 17:27:21 +0300
From:   Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
To:     Linus Walleij <linus.walleij@...aro.org>,
        Kuppuswamy Sathyanarayanan 
        <sathyanarayanan.kuppuswamy@...ux.intel.com>
Cc:     Alexandre Courbot <gnurou@...il.com>,
        "linux-gpio@...r.kernel.org" <linux-gpio@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        sathyaosid@...il.com,
        Mika Westerberg <mika.westerberg@...ux.intel.com>
Subject: Re: [PATCH v1 2/2] gpio: gpio-wcove: fix irq pending status bit
 width

On Mon, 2017-04-24 at 15:15 +0200, Linus Walleij wrote:
> On Fri, Apr 14, 2017 at 7:29 PM,
> <sathyanarayanan.kuppuswamy@...ux.intel.com> wrote:
> 
> > From: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@...ux.i
> > ntel.com>
> > 
> > Whiskey cove PMIC has three GPIO banks with total number of 13 GPIO
> > pins. But when checking for the pending status, for_each_set_bit()
> > uses
> > bit width of 7 and hence it only checks the status for first 7 GPIO
> > pins
> > missing to check/clear the status of rest of the GPIO pins. This
> > patch
> > fixes this issue.
> > 
> > Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswam
> > y@...ux.intel.com>
> 
> Looks reasonable so patch applied.
> 
> Just looping in Mika & Andy so they have an idea about what's going
> on.

This is fine by me, thanks!


-- 
Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
Intel Finland Oy

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ