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Date:   Mon, 24 Apr 2017 12:40:35 -0400 (EDT)
From:   David Miller <davem@...emloft.net>
To:     rogerq@...com
Cc:     andrew@...n.ch, f.fainelli@...il.com, tony@...mide.com,
        nsekhar@...com, jsarha@...com, netdev@...r.kernel.org,
        linux-omap@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v4 net-next] mdio_bus: Issue GPIO RESET to PHYs.

From: Roger Quadros <rogerq@...com>
Date: Fri, 21 Apr 2017 16:15:38 +0300

> Some boards [1] leave the PHYs at an invalid state
> during system power-up or reset thus causing unreliability
> issues with the PHY which manifests as PHY not being detected
> or link not functional. To fix this, these PHYs need to be RESET
> via a GPIO connected to the PHY's RESET pin.
> 
> Some boards have a single GPIO controlling the PHY RESET pin of all
> PHYs on the bus whereas some others have separate GPIOs controlling
> individual PHY RESETs.
> 
> In both cases, the RESET de-assertion cannot be done in the PHY driver
> as the PHY will not probe till its reset is de-asserted.
> So do the RESET de-assertion in the MDIO bus driver.
> 
> [1] - am572x-idk, am571x-idk, a437x-idk
> 
> Signed-off-by: Roger Quadros <rogerq@...com>

Applied, thanks.

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