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Message-ID: <1493198774-4478-5-git-send-email-sean.wang@mediatek.com>
Date: Wed, 26 Apr 2017 17:25:48 +0800
From: <sean.wang@...iatek.com>
To: <robh+dt@...nel.org>, <matthias.bgg@...il.com>, <john@...ozen.org>,
<mark.rutland@....com>, <linux@...linux.org.uk>,
<linus.walleij@...aro.org>, <devicetree@...r.kernel.org>,
<linux-mediatek@...ts.infradead.org>
CC: <linux-arm-kernel@...ts.infradead.org>,
<linux-gpio@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
Sean Wang <sean.wang@...iatek.com>
Subject: [PATCH v2 04/30] arm: dts: mt7623: add subsystem clock controller device nodes
From: John Crispin <john@...ozen.org>
Add MT7623 subsystem clock controllers for hifsys and ethsys.
Signed-off-by: John Crispin <john@...ozen.org>
Signed-off-by: Sean Wang <sean.wang@...iatek.com>
---
arch/arm/boot/dts/mt7623.dtsi | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi
index b97b2ba..54cff6a 100644
--- a/arch/arm/boot/dts/mt7623.dtsi
+++ b/arch/arm/boot/dts/mt7623.dtsi
@@ -190,4 +190,20 @@
clock-names = "baud", "bus";
status = "disabled";
};
+
+ hifsys: syscon@...00000 {
+ compatible = "mediatek,mt7623-hifsys",
+ "mediatek,mt2701-hifsys",
+ "syscon";
+ reg = <0 0x1a000000 0 0x1000>;
+ #clock-cells = <1>;
+ };
+
+ ethsys: syscon@...00000 {
+ compatible = "mediatek,mt7623-ethsys",
+ "mediatek,mt2701-ethsys",
+ "syscon";
+ reg = <0 0x1b000000 0 0x1000>;
+ #clock-cells = <1>;
+ };
};
--
1.9.1
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