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Message-ID: <20170426144108.GD7170@e110455-lin.cambridge.arm.com>
Date:   Wed, 26 Apr 2017 15:41:08 +0100
From:   Liviu Dudau <liviu.dudau@....com>
To:     Arnd Bergmann <arnd@...db.de>
Cc:     Brian Starkey <brian.starkey@....com>,
        Mali DP Maintainers <malidp@...s.arm.com>,
        David Airlie <airlied@...ux.ie>,
        Mihail Atanassov <mihail.atanassov@....com>,
        Daniel Vetter <daniel.vetter@...ll.ch>,
        Shawn Guo <shawn.guo@...aro.org>,
        dri-devel@...ts.freedesktop.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] drm: mali-dp: use div_u64 for expensive 64-bit divisions

On Tue, Apr 25, 2017 at 09:56:53PM +0200, Arnd Bergmann wrote:
> On 32-bit machines, we can't divide 64-bit integers:
> 
> drivers/gpu/drm/arm/malidp_crtc.o: In function `malidp_crtc_atomic_check':
> malidp_crtc.c:(.text.malidp_crtc_atomic_check+0x3c0): undefined reference to `__aeabi_uldivmod'
> malidp_crtc.c:(.text.malidp_crtc_atomic_check+0x3dc): undefined reference to `__aeabi_uldivmod'
> 
> This calls the div_u64 function explicitly instead.
> 
> Fixes: 4cea4e9f6690 ("drm: mali-dp: Add plane upscaling support")
> Signed-off-by: Arnd Bergmann <arnd@...db.de>

Acked-by: Liviu Dudau <liviu.dudau@....com>

I'll push the patch to the mali-dp repository. Dave A., if you have pulled the mali-dp
patches then this will need to go in as well, otherwise I will send an updated pull
request soon.

Best regards,
Liviu

> ---
>  drivers/gpu/drm/arm/malidp_crtc.c | 9 ++++-----
>  1 file changed, 4 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/arm/malidp_crtc.c b/drivers/gpu/drm/arm/malidp_crtc.c
> index 19f1f3b34691..9446a673d469 100644
> --- a/drivers/gpu/drm/arm/malidp_crtc.c
> +++ b/drivers/gpu/drm/arm/malidp_crtc.c
> @@ -266,7 +266,6 @@ static int malidp_crtc_atomic_check_scaling(struct drm_crtc *crtc,
>  
>  	drm_atomic_crtc_state_for_each_plane_state(plane, pstate, state) {
>  		struct malidp_plane *mp = to_malidp_plane(plane);
> -		u64 crtc_w, crtc_h;
>  		u32 phase;
>  
>  		if (!(mp->layer->id & scaling))
> @@ -276,10 +275,10 @@ static int malidp_crtc_atomic_check_scaling(struct drm_crtc *crtc,
>  		 * Convert crtc_[w|h] to U32.32, then divide by U16.16 src_[w|h]
>  		 * to get the U16.16 result.
>  		 */
> -		crtc_w = (u64)pstate->crtc_w << 32;
> -		crtc_h = (u64)pstate->crtc_h << 32;
> -		h_upscale_factor = (u32)(crtc_w / pstate->src_w);
> -		v_upscale_factor = (u32)(crtc_h / pstate->src_h);
> +		h_upscale_factor = div_u64((u64)pstate->crtc_w << 32,
> +					   pstate->src_w);
> +		v_upscale_factor = div_u64((u64)pstate->crtc_h << 32,
> +					   pstate->src_h);
>  
>  		s->enhancer_enable = ((h_upscale_factor >> 16) >= 2 ||
>  				      (v_upscale_factor >> 16) >= 2);
> -- 
> 2.9.0
> 

-- 
====================
| I would like to |
| fix the world,  |
| but they're not |
| giving me the   |
 \ source code!  /
  ---------------
    ¯\_(ツ)_/¯

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