linux-kernel - Re: [PATCH v4 00/21] PCI: fix config space memory mappings

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Message-ID: <000501d2beb2$023b9100$06b2b300$@gmail.com>
Date:   Wed, 26 Apr 2017 13:24:48 -0400
From:   "Jingoo Han" <jingoohan1@...il.com>
To:     "'Dongdong Liu'" <liudongdong3@...wei.com>,
        "'Khuong Dinh'" <kdinh@....com>,
        "'Jon Masters'" <jcm@...masters.org>,
        "'Lorenzo Pieralisi'" <lorenzo.pieralisi@....com>,
        <linux-pci@...r.kernel.org>
Cc:     <linux-kernel@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        "'Pratyush Anand'" <pratyush.anand@...il.com>,
        "'Arnd Bergmann'" <arnd@...db.de>,
        "'Jonathan Corbet'" <corbet@....net>,
        "'Will Deacon'" <will.deacon@....com>,
        "'Bjorn Helgaas'" <bhelgaas@...gle.com>,
        "'Mingkai Hu'" <mingkai.hu@...escale.com>,
        "'Tanmay Inamdar'" <tinamdar@....com>,
        "'Murali Karicheri'" <m-karicheri2@...com>,
        "'Russell King'" <linux@...linux.org.uk>,
        "'Bharat Kumar Gogada'" <bharat.kumar.gogada@...inx.com>,
        "'Ray Jui'" <rjui@...adcom.com>,
        "'Wenrui Li'" <wenrui.li@...k-chips.com>,
        "'Shawn Lin'" <shawn.lin@...k-chips.com>,
        "'Minghuan Lian'" <minghuan.Lian@...escale.com>,
        "'Catalin Marinas'" <catalin.marinas@....com>,
        "'Jon Mason'" <jonmason@...adcom.com>,
        "'Gabriele Paoloni'" <gabriele.paoloni@...wei.com>,
        "'Thomas Petazzoni'" <thomas.petazzoni@...e-electrons.com>,
        "'Joao Pinto'" <Joao.Pinto@...opsys.com>,
        "'Thierry Reding'" <thierry.reding@...il.com>,
        "'Luis R . Rodriguez'" <mcgrof@...nel.org>,
        "'Michal Simek'" <michal.simek@...inx.com>,
        "'Stanimir Varbanov'" <svarbanov@...sol.com>,
        "'Zhou Wang'" <wangzhou1@...ilicon.com>,
        "'Roy Zang'" <tie-fei.zang@...escale.com>,
        "'Benjamin Herrenschmidt'" <benh@...nel.crashing.org>,
        "'John Garry'" <john.garry@...wei.com>,
        "'Linuxarm'" <linuxarm@...wei.com>
Subject: Re: [PATCH v4 00/21] PCI: fix config space memory mappings

On Wednesday, April 26, 2017 6:54 AM, Dongdong Liu wrote;
> 
> Tested-by: Dongdong Liu <liudongdong3@...wei.com>
> 
> I tested the patchset on HiSilicon ARM64 D05 board.It works ok with 82599
> netcard.

Thank you for testing these patches. HiSilicon PCIe may use Designware-based
PCIe controller. In my opinion, other Designware-based PCIe controller will
work properly.

To Dongdong Liu, Khuong Dinh, and other people,
If possible, can you check the output of 'lspci -v'?
If you find something different, please share it with us.
Good luck.

Best regards,
Jingoo Han

> 
> Thanks,
> Dongdong
> 在 2017/4/25 14:40, Jon Masters 写道:
> > On 04/19/2017 12:48 PM, Lorenzo Pieralisi wrote:
> >
> >> On some platforms (ie ARM/ARM64) ioremap fails to comply with the PCI
> >> configuration non-posted write transactions requirement, because it
> >> provides a memory mapping that issues "bufferable" or, in PCI terms
> >> "posted" write transactions. Likewise, the current pci_remap_iospace()
> >> implementation maps the physical address range that the PCI translates
> >> to I/O space cycles to virtual address space through pgprot_device()
> >> attributes that on eg ARM64 provides a memory mapping issuing
> >> posted writes transactions, which is not PCI specifications compliant.
> >
> > Side note that I've pinged all of the ARM server vendors and asked them
> > to verify this patch series on their platforms.
> >
> > Jon.
> >
> > .
> >