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Message-ID: <20170427132805.izv6xfktlhfc4yty@lukather>
Date:   Thu, 27 Apr 2017 15:28:05 +0200
From:   Maxime Ripard <maxime.ripard@...e-electrons.com>
To:     Icenowy Zheng <icenowy@...c.io>
Cc:     Thomas Gleixner <tglx@...utronix.de>,
        Rob Herring <robh+dt@...nel.org>, Chen-Yu Tsai <wens@...e.org>,
        Lee Jones <lee.jones@...aro.org>,
        Liam Girdwood <lgirdwood@...il.com>,
        linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org, linux-sunxi@...glegroups.com
Subject: Re: [PATCH v5 01/10] arm64: allwinner: a64: enable RSB on A64

On Wed, Apr 26, 2017 at 11:20:14PM +0800, Icenowy Zheng wrote:
> Allwinner A64 have a RSB controller like the one on A23/A33 SoCs.
> 
> Add it and its pinmux.
> 
> Signed-off-by: Icenowy Zheng <icenowy@...c.io>
> Acked-by: Chen-Yu Tsai <wens@...e.org>
> ---
> Changes in v2:
> - Removed bonus properties in pio node.
> - Added Chen-Yu's ACK.
> 
>  arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 19 +++++++++++++++++++
>  1 file changed, 19 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> index c7f669f5884f..05ec9fc5e81f 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> @@ -422,6 +422,25 @@
>  			#gpio-cells = <3>;
>  			interrupt-controller;
>  			#interrupt-cells = <3>;
> +
> +			r_rsb_pins: rsb@0 {
> +				pins = "PL0", "PL1";
> +				function = "s_rsb";
> +			};
> +		};
> +
> +		r_rsb: rsb@...3400 {
> +			compatible = "allwinner,sun8i-a23-rsb";
> +			reg = <0x01f03400 0x400>;
> +			interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&r_ccu 6>;

Please use the defines here..

> +			clock-frequency = <3000000>;
> +			resets = <&r_ccu 2>;

And here.

Thanks!
Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

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