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Message-ID: <20170427182535.GD17364@lunn.ch>
Date:   Thu, 27 Apr 2017 20:25:35 +0200
From:   Andrew Lunn <andrew@...n.ch>
To:     Vivien Didelot <vivien.didelot@...oirfairelinux.com>
Cc:     netdev@...r.kernel.org, linux-kernel@...r.kernel.org,
        kernel@...oirfairelinux.com,
        "David S. Miller" <davem@...emloft.net>,
        Florian Fainelli <f.fainelli@...il.com>
Subject: Re: [PATCH net-next 02/18] net: dsa: mv88e6xxx: split VTU entry data
 member

On Wed, Apr 26, 2017 at 11:53:20AM -0400, Vivien Didelot wrote:
> VLAN aware Marvell chips can program 802.1Q VLAN membership as well as
> 802.1s per VLAN Spanning Tree state using the same 3 VTU Data registers.
> 
> Some chips such as 88E6185 use different Data registers offsets for
> ports state and membership, and program them in a single operation.
> 
> Other chips such as 88E6352 use the same register layout but program
> them in distinct operations (an indirect table is used for 802.1s.)
> 
> Newer chips such as 88E6390 use the same offsets for both state and
> membership in distinct operations, thus require multiple data accesses.
> 
> To correctly abstract this, split the "data" structure member of
> mv88e6xxx_vtu_entry in two "state" and "member" members, before adding
> VTU support for newer chips.
> 
> Signed-off-by: Vivien Didelot <vivien.didelot@...oirfairelinux.com>

Reviewed-by: Andrew Lunn <andrew@...n.ch>

    Andrew

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