linux-kernel - Re: [PATCH 2/2] dt-bindings: phy: Add documentation for Mediatek PCIe PHY

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Message-ID: <1493708937.6464.36.camel@mtkswgap22>
Date:   Tue, 2 May 2017 15:08:57 +0800
From:   Ryder Lee <ryder.lee@...iatek.com>
To:     Rob Herring <robh@...nel.org>
CC:     Kishon Vijay Abraham I <kishon@...com>,
        Matthias Brugger <matthias.bgg@...il.com>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-mediatek@...ts.infradead.org>
Subject: Re: [PATCH 2/2] dt-bindings: phy: Add documentation for Mediatek
 PCIe PHY

On Fri, 2017-04-28 at 12:52 -0500, Rob Herring wrote:
> On Sun, Apr 23, 2017 at 04:17:33PM +0800, Ryder Lee wrote:
> > Add documentation for PCIe PHY available in MT7623 series SoCs.
> > 
> > Signed-off-by: Ryder Lee <ryder.lee@...iatek.com>
> > ---
> >  .../devicetree/bindings/phy/phy-mt7623-pcie.txt    | 67 ++++++++++++++++++++++
> >  1 file changed, 67 insertions(+)
> >  create mode 100644 Documentation/devicetree/bindings/phy/phy-mt7623-pcie.txt
> > 
> > diff --git a/Documentation/devicetree/bindings/phy/phy-mt7623-pcie.txt b/Documentation/devicetree/bindings/phy/phy-mt7623-pcie.txt
> > new file mode 100644
> > index 0000000..27a9253
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/phy/phy-mt7623-pcie.txt
> > @@ -0,0 +1,67 @@
> > +Mediatek MT7623 PCIe PHY
> > +-----------------------
> > +
> > +Required properties:
> > + - compatible: Should contain "mediatek,mt7623-pcie-phy"
> > + - #phy-cells: must be 0
> > + - clocks: Must contain an entry in clock-names.
> > +	See ../clocks/clock-bindings.txt for details.
> > + - clock-names: Must be "refclk"
> > + - resets: Must contain an entry in reset-names.
> > +	See ../reset/reset.txt for details.
> > + - reset-names: Must be "phy"
> > +
> > +Optional properties:
> > + - phy-switch: The PHY on PCIe port2 is shared with USB u3phy2. If you
> > +	want to enable port2, you should contain it.
> 
> Need to state what the value is (i.e. a phandle to ?). Also needs a 
> vendor prefix.

I will correct it.

> > +
> > +Example:
> > +
> > +	pcie0_phy: pciephy@...49000 {
> 
> pcie-phy@...

Okay.
> > +		compatible = "mediatek,mt7623-pcie-phy";
> > +		reg = <0 0x1a149000 0 0x1000>;
> > +		clocks = <&clk26m>;
> > +		clock-names = "pciephya_ref";
> > +		#phy-cells = <0>;
> > +		status = "disabled";
> 
> Don't show status in examples.
I will drop it all.
> > +	};
> > +
> > +	pcie1_phy: pciephy@...4a000 {
> > +		compatible = "mediatek,mt7623-pcie-phy";
> > +		reg = <0 0x1a14a000 0 0x1000>;
> > +		clocks = <&clk26m>;
> > +		clock-names = "pciephya_ref";
> > +		#phy-cells = <0>;
> > +		status = "disabled";
> > +	};
> > +
> > +	pcie2_phy: pciephy@...44000 {
> > +		compatible = "mediatek,mt7623-pcie-phy";
> > +		reg = <0 0x1a244000 0 0x1000>;
> > +		clocks = <&clk26m>;
> > +		clock-names = "pciephya_ref";
> > +		#phy-cells = <0>;
> > +
> > +		phy-switch = <&hifsys>;
> > +		status = "disabled";
> > +	};
> > +
> > +Specifying phy control of devices
> > +---------------------------------
> > +
> > +Device nodes should specify the configuration required in their "phys"
> > +property, containing a phandle to the phy node and phy-names.
> > +
> > +Example:
> > +
> > +#include <dt-bindings/phy/phy.h>
> > +
> > +pcie: pcie@...40000 {
> > +	...
> > +	pcie@1,0 {
> > +		...
> > +		phys = <&pcie0_phy>;
> > +		phy-names = "pcie-phy0";
> > +	}
> > +	...
> > +};

Thanks for your reviews.
> > -- 
> > 1.9.1
> >