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Message-ID: <908ed0dc-2a75-4348-357c-191fa7348974@nvidia.com>
Date: Tue, 2 May 2017 16:23:24 +0100
From: Jon Hunter <jonathanh@...dia.com>
To: Laxman Dewangan <ldewangan@...dia.com>, <thierry.reding@...il.com>
CC: <linux-pwm@...r.kernel.org>, <linux-tegra@...r.kernel.org>,
<linux-kernel@...r.kernel.org>
Subject: Re: [PATCH V2] pwm: tegra: Set maximum pwm clock source per SoC
tapeout
On 02/05/17 15:05, Laxman Dewangan wrote:
> The PWM hardware IP is taped-out with different maximum frequency
> on different SoCs.
>
> From HW team:
> Before Tegra186, it is 38.4MHz.
> In Tegra186, it is 102MHz.
>
> Add support to limit the clock source frequency to the maximum IP
> supported frequency. Provide these values via SoC chipdata.
>
> Signed-off-by: Laxman Dewangan <ldewangan@...dia.com>
>
> ---
> Changes from V1:
> - Set the 48MHz maximum frequency for Tegra210 and earlier.
I think that your changelog needs to be updated, because it still says
38.4MHz and not 48MHz.
Cheers
Jon
--
nvpublic
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