lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <CAL_JsqJmF7YhVTqC0daEd50DFAJLyfq-rnUv6sZhabTmm56wQw@mail.gmail.com>
Date:   Mon, 1 May 2017 22:01:50 -0500
From:   Rob Herring <robh+dt@...nel.org>
To:     Jonathan Cameron <jic23@...nel.org>
Cc:     Eva Rachel Retuya <eraretuya@...il.com>,
        "linux-iio@...r.kernel.org" <linux-iio@...r.kernel.org>,
        Hartmut Knaack <knaack.h@....de>,
        Lars-Peter Clausen <lars@...afoo.de>,
        Peter Meerwald <pmeerw@...erw.net>,
        Dmitry Torokhov <dmitry.torokhov@...il.com>,
        Michael Hennerich <michael.hennerich@...log.com>,
        Daniel Baluta <daniel.baluta@...il.com>,
        Alison Schofield <amsfield22@...il.com>,
        Florian Vaussard <florian.vaussard@...g-vd.ch>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2 3/4] iio: accel: adxl345: Setup DATA_READY trigger

On Sun, Apr 30, 2017 at 7:32 PM, Jonathan Cameron <jic23@...nel.org> wrote:
> On 29/04/17 08:49, Eva Rachel Retuya wrote:
>> The ADXL345 provides a DATA_READY interrupt function to signal
>> availability of new data. This interrupt function is latched and can be
>> cleared by reading the data registers. The polarity is set to active
>> high by default.
>>
>> Support this functionality by setting it up as an IIO trigger.
>>
>> In addition, two output pins INT1 and INT2 are available for driving
>> interrupts. Allow mapping to either pins by specifying the
>> interrupt-names property in device tree.
>>
>> Signed-off-by: Eva Rachel Retuya <eraretuya@...il.com>
> Coming together nicely, but a few more bits and pieces inline...
>
> One slight worry is that the irq names stuff is to restrictive
> as we want to direct different interrupts to different pins if
> both are supported!

[...]

>> @@ -199,6 +253,22 @@ int adxl345_core_probe(struct device *dev, struct regmap *regmap,
>>               dev_err(dev, "Failed to set data range: %d\n", ret);
>>               return ret;
>>       }
>> +     /*
>> +      * Any bits set to 0 send their respective interrupts to the INT1 pin,
>> +      * whereas bits set to 1 send their respective interrupts to the INT2
>> +      * pin. Map all interrupts to the specified pin.
> This is an interesting comment.  The usual reason for dual interrupt
> pins is precisely to not map all functions to the same one.  That allows
> for a saving in querying which interrupt it is by having just the data ready
> on one pin and just the events on the other...
>
> Perhaps the current approach won't support that mode of operation?
> Clearly we can't merge a binding that enforces them all being the same
> and then change it later as it'll be incompatible.
>
> I'm not quite sure how one should do this sort of stuff in DT though.
>
> Rob?

DT should just describe what is connected which I gather here could be
either one or both IRQs. We generally distinguish the IRQs with the
interrupt-names property and then retrieve it as below.

>> +      */
>> +     of_irq = of_irq_get_byname(dev->of_node, "INT2");
>> +     if (of_irq == irq)
>> +             regval = 0xFF;
>> +     else
>> +             regval = 0x00;

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ