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Message-ID: <20170504164509.uggp7ff335hnm2zt@pd.tnic>
Date: Thu, 4 May 2017 18:45:09 +0200
From: Borislav Petkov <bp@...en8.de>
To: Radim Krčmář <rkrcmar@...hat.com>
Cc: linux-kernel@...r.kernel.org, kvm@...r.kernel.org,
Paolo Bonzini <pbonzini@...hat.com>,
Alexander Graf <agraf@...e.de>,
"Michael S. Tsirkin" <mst@...hat.com>,
"Gabriel L. Somlo" <gsomlo@...il.com>
Subject: Re: [PATCH 1/4] KVM: svm: prevent MWAIT in guest with erratum 400
On Thu, May 04, 2017 at 04:02:44PM +0200, Radim Krčmář wrote:
> X86_BUG_AMD_APIC_C1E doesn't cover C3, which is why I used
> X86_BUG_AMD_E400.
Practically, the CPUs which even support C3 with E400 are single-core
devices and C3 support was removed with revision C3 (yap, the same as
the ACPI state) so I think we can safely ignore C3 here.
I mean, otherwise, we would be seeing E400 in action as our workaround
would not be sufficient. And even then, I don't think we ever go into C3
on those machines as we do HLT which enters C1.
> The host uses APIC timer when entering a guest and I assumed that MWAIT
> can change C states, but it seems that affected AMD models do not even
> support MWAIT hints and the package is in C0 the whole time.
Right, we never do MWAIT when idle on AMD but HLT.
I notice now that MWAIT text has received recent additions talking
about C-state hints but we'd need to evaluate that first and how power
consumption behaves and it probably would work the same way as it does
on Intel.
Thanks.
--
Regards/Gruss,
Boris.
Good mailing practices for 400: avoid top-posting and trim the reply.
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