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Date: Fri, 5 May 2017 21:53:26 +0800
From: Hanjun Guo <hanjun.guo@...aro.org>
To: Geetha sowjanya <gakula@...iumnetworks.com>, will.deacon@....com,
robin.murphy@....com, lorenzo.pieralisi@....com,
sudeep.holla@....com, iommu@...ts.linux-foundation.org
Cc: jcm@...hat.com, linux-kernel@...r.kernel.org,
robert.richter@...ium.com, catalin.marinas@....com,
sgoutham@...ium.com, linux-arm-kernel@...ts.infradead.org,
linux-acpi@...r.kernel.org, geethasowjanya.akula@...il.com,
linu.cherian@...ium.com, Charles.Garcia-Tobin@....com,
Geetha Sowjanya <geethasowjanya.akula@...ium.com>
Subject: Re: [PATCH v3 3/7] ACPICA: IORT: Add Cavium ThunderX2 SMMUv3 model
definition.
On 2017/5/5 20:08, Geetha sowjanya wrote:
> From: Linu Cherian <linu.cherian@...ium.com>
>
> Add SMMUv3 model definition for ThunderX2.
>
> Signed-off-by: Linu Cherian <linu.cherian@...ium.com>
> Signed-off-by: Geetha Sowjanya <geethasowjanya.akula@...ium.com>
> ---
> include/acpi/actbl2.h | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/include/acpi/actbl2.h b/include/acpi/actbl2.h
> index faa9f2c..76a6f5d 100644
> --- a/include/acpi/actbl2.h
> +++ b/include/acpi/actbl2.h
> @@ -779,6 +779,8 @@ struct acpi_iort_smmu {
> #define ACPI_IORT_SMMU_CORELINK_MMU400 0x00000002 /* ARM Corelink MMU-400 */
> #define ACPI_IORT_SMMU_CORELINK_MMU500 0x00000003 /* ARM Corelink MMU-500 */
>
> +#define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX 0x00000002 /* Cavium ThunderX2 SMMUv3 */
There are some other model numbers in the unreleased spec,
I think we need to wait for the updated IORT spec to
be released.
Thanks
Hanjun
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