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Message-ID: <734dd5df-1be5-9f97-b373-358b70d0b107@vodafone.de>
Date: Mon, 8 May 2017 10:54:55 +0200
From: Christian König <deathsimple@...afone.de>
To: Bjorn Helgaas <helgaas@...nel.org>, Yinghai Lu <yinghai@...nel.org>
Cc: Bjorn Helgaas <bhelgaas@...gle.com>,
David Miller <davem@...emloft.net>,
Benjamin Herrenschmidt <benh@...nel.crashing.org>,
Wei Yang <weiyang@...ux.vnet.ibm.com>,
Khalid Aziz <khalid.aziz@...cle.com>,
linux-pci@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 11/13] PCI: Add has_mem64 for struct host_bridge
Am 05.05.2017 um 01:04 schrieb Bjorn Helgaas:
> [+cc Christian]
Thanks for that.
> [SNIP]
> I *think* this will be broken by the current implementation of
> Christian's patch to enable a 64-bit host bridge window:
>
> https://lkml.kernel.org/r/1493890270-1188-5-git-send-email-deathsimple@vodafone.de
>
> because pci_register_host_bridge() runs before we scan the bus, and
> Christian's patch adds a quirk that runs when we enumerate the AMD
> host bridge device.
>
> If we apply this and Christian's patch, I think we could end up with
> a host bridge window above 4G, but with bridge->has_mem64 not set.
Yes, indeed. I can adjust my patch, but I would prefer not to do so.
I don't completely understand the background of this change, but from
what I know how the BIOS (at least on X86) allocates resources it
doesn't sounds correct to me.
Maybe we just need a Sparc specific quirk here instead of changing the
common logic?
Regards,
Christian.
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