linux-kernel - Re: [PATCH] ACPI: SPCR: Use access width to determine mmio usage

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Message-ID: <CAPw-ZTkF2KnC2TWwxWLTKoM5LPkipHvJeQGaBp30JjDNQ76VEA@mail.gmail.com>
Date:   Mon, 8 May 2017 12:11:59 -0700
From:   Loc Ho <lho@....com>
To:     Jon Masters <jcm@...hat.com>
Cc:     Jon Mason <jon.mason@...adcom.com>,
        Rafael Wysocki <rjw@...ysocki.net>,
        Len Brown <lenb@...nel.org>,
        Robert Moore <robert.moore@...el.com>,
        Lv Zheng <lv.zheng@...el.com>, linux-acpi@...r.kernel.org,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        devel@...ica.org, bcm-kernel-feedback-list@...adcom.com
Subject: Re: [PATCH] ACPI: SPCR: Use access width to determine mmio usage

Hi Jon,

>> The current SPCR code does not check the access width of the mmio, and
>> uses a default of 8bit register accesses.  This prevents devices that
>> only do 16 or 32bit register accesses from working.  By simply checking
>> this field and setting the mmio string appropriately, this issue can be
>> corrected.  To prevent any legacy issues, the code will default to 8bit
>> accesses if the value is anything but 16 or 32.
>
> Thanks for this. Just as an FYI I've a running discussion with Microsoft
> about defining additional UART subtypes in the DBG2 for special case
> UARTs. Specifically, I want to address AppliedMicro's special 8250 dw IP
> that also has a non-standard clock. At this time, there is general
> agreement to use the access width for some cases rather than defining
> yet more subtypes - so your patch is good.
>
> Loc/Applied: please track this thread, incorporate feedback, and also
> track the other general recent discussions of 8250 dw from this week.

Thanks for forward me this patch. This patch does not work with X-Gene
v1 and v2 SoC's. As BIOS SPCR encodes these info as:

Bit Width: 32
Bit Offset: 0
Encoded Access Width: 01 (Byte Access)

With this patch, it would use the "mmio" instead the "mmio32" as with
this patch - https://patchwork.kernel.org/patch/9460959

-Loc