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Message-ID: <201705092239.btgY8Dwi%fengguang.wu@intel.com>
Date: Tue, 9 May 2017 22:17:21 +0800
From: kbuild test robot <fengguang.wu@...el.com>
To: Anton Blanchard <anton@...ba.org>
Cc: kbuild-all@...org, linux-kernel@...r.kernel.org,
Ingo Molnar <mingo@...nel.org>
Subject: arch/x86/include/asm/qspinlock.h:17:9: sparse: context imbalance in
'__replace_page' - unexpected unlock
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head: 2868b2513aa732a99ea4a0a6bf10dc93c1f3dac2
commit: 6b0b7551428e4caae1e2c023a529465a9a9ae2d4 perf/core: Rename CONFIG_[UK]PROBE_EVENT to CONFIG_[UK]PROBE_EVENTS
date: 10 weeks ago
reproduce:
# apt-get install sparse
git checkout 6b0b7551428e4caae1e2c023a529465a9a9ae2d4
make ARCH=x86_64 allmodconfig
make C=1 CF=-D__CHECK_ENDIAN__
sparse warnings: (new ones prefixed by >>)
>> arch/x86/include/asm/qspinlock.h:17:9: sparse: context imbalance in '__replace_page' - unexpected unlock
vim +/__replace_page +17 arch/x86/include/asm/qspinlock.h
d73a3397 Waiman Long 2015-04-24 1 #ifndef _ASM_X86_QSPINLOCK_H
d73a3397 Waiman Long 2015-04-24 2 #define _ASM_X86_QSPINLOCK_H
d73a3397 Waiman Long 2015-04-24 3
2aa79af6 Peter Zijlstra (Intel 2015-04-24 4) #include <asm/cpufeature.h>
d73a3397 Waiman Long 2015-04-24 5 #include <asm-generic/qspinlock_types.h>
f233f7f1 Peter Zijlstra (Intel 2015-04-24 6) #include <asm/paravirt.h>
d73a3397 Waiman Long 2015-04-24 7
d73a3397 Waiman Long 2015-04-24 8 #define queued_spin_unlock queued_spin_unlock
d73a3397 Waiman Long 2015-04-24 9 /**
d73a3397 Waiman Long 2015-04-24 10 * queued_spin_unlock - release a queued spinlock
d73a3397 Waiman Long 2015-04-24 11 * @lock : Pointer to queued spinlock structure
d73a3397 Waiman Long 2015-04-24 12 *
d73a3397 Waiman Long 2015-04-24 13 * A smp_store_release() on the least-significant byte.
d73a3397 Waiman Long 2015-04-24 14 */
f233f7f1 Peter Zijlstra (Intel 2015-04-24 15) static inline void native_queued_spin_unlock(struct qspinlock *lock)
d73a3397 Waiman Long 2015-04-24 16 {
d73a3397 Waiman Long 2015-04-24 @17 smp_store_release((u8 *)lock, 0);
d73a3397 Waiman Long 2015-04-24 18 }
d73a3397 Waiman Long 2015-04-24 19
f233f7f1 Peter Zijlstra (Intel 2015-04-24 20) #ifdef CONFIG_PARAVIRT_SPINLOCKS
f233f7f1 Peter Zijlstra (Intel 2015-04-24 21) extern void native_queued_spin_lock_slowpath(struct qspinlock *lock, u32 val);
f233f7f1 Peter Zijlstra (Intel 2015-04-24 22) extern void __pv_init_lock_hash(void);
f233f7f1 Peter Zijlstra (Intel 2015-04-24 23) extern void __pv_queued_spin_lock_slowpath(struct qspinlock *lock, u32 val);
f233f7f1 Peter Zijlstra (Intel 2015-04-24 24) extern void __raw_callee_save___pv_queued_spin_unlock(struct qspinlock *lock);
f233f7f1 Peter Zijlstra (Intel 2015-04-24 25)
:::::: The code at line 17 was first introduced by commit
:::::: d73a33973f16ab6703e75ea00edee857afa3406e locking/qspinlock, x86: Enable x86-64 to use queued spinlocks
:::::: TO: Waiman Long <Waiman.Long@...com>
:::::: CC: Ingo Molnar <mingo@...nel.org>
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