linux-kernel - Re: [PATCH 3/3] arm64/locking: qspinlocks and qrwlocks support

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Message-ID: <20170509184829.scwjixgc2kxxxku7@yury-N73SV>
Date:   Tue, 9 May 2017 21:48:29 +0300
From:   Yury Norov <ynorov@...iumnetworks.com>
To:     Boqun Feng <boqun.feng@...il.com>
Cc:     Will Deacon <will.deacon@....com>,
        Peter Zijlstra <peterz@...radead.org>,
        linux-kernel@...r.kernel.org, linux-arch@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org,
        Adam Wallis <awallis@...eaurora.org>,
        Andrew Pinski <Andrew.Pinski@...ium.com>,
        Arnd Bergmann <arnd@...db.de>,
        Catalin Marinas <catalin.marinas@....com>,
        Ingo Molnar <mingo@...hat.com>,
        Jan Glauber <jglauber@...ium.com>,
        Mark Rutland <mark.rutland@....com>,
        Pan Xinhui <xinhui.pan@...ux.vnet.ibm.com>
Subject: Re: [PATCH 3/3] arm64/locking: qspinlocks and qrwlocks support

On Tue, May 09, 2017 at 12:47:08PM +0800, Boqun Feng wrote:
> On Wed, May 03, 2017 at 05:51:41PM +0300, Yury Norov wrote:
> > From: Jan Glauber <jglauber@...ium.com>
> > 
> > Ported from x86_64 with paravirtualization support removed.
> > 
> > Signed-off-by: Jan Glauber <jglauber@...ium.com>
> > 
> > Note. This patch removes protection from direct inclusion of
> > arch/arm64/include/asm/spinlock_types.h. It's done because
> > kernel/locking/qrwlock.c file does it thru the header
> > include/asm-generic/qrwlock_types.h. Until now the only user
> > of qrwlock.c was x86, and there's no such protection too.
> > 
> > I'm not happy to remove the protection, but if it's OK for x86,
> > it should be also OK for arm64. If not, I think we'd fix it
> > for x86, and add the protection there too.
> > 
> > Yury
> > 
> > Signed-off-by: Yury Norov <ynorov@...iumnetworks.com>

[...]

> > +#define	queued_spin_unlock queued_spin_unlock
> > +/**
> > + * queued_spin_unlock - release a queued spinlock
> > + * @lock : Pointer to queued spinlock structure
> > + *
> > + * A smp_store_release() on the least-significant byte.
> > + */
> > +static inline void queued_spin_unlock(struct qspinlock *lock)
> > +{
> > +	smp_store_release((u8 *)lock, 0);
> 
> I think this part will cause endian issues, maybe you want something
> like what we do in queued_write_lock().
> 
> Have you tested this on an BE environment?

No. I think I have to. Thanks for the pointing it.

> 
> Regards,
> Boqun

I think it's just the issue of copying from x86, and there's no any
specific need to cast to u8* type on arm64. So the correct version of
it would be like this, I believe: smp_store_release(&lock->val).

Yury