linux-kernel - Re: [PATCH v9 3/4] arm: dts: mt2701: Add node for Mediatek JPEG Decoder

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Date:   Wed, 10 May 2017 13:02:19 +0200
From:   Matthias Brugger <matthias.bgg@...il.com>
To:     Rick Chang <rick.chang@...iatek.com>,
        Hans Verkuil <hans.verkuil@...co.com>,
        Laurent Pinchart <laurent.pinchart+renesas@...asonboard.com>,
        Mauro Carvalho Chehab <mchehab@...nel.org>,
        Rob Herring <robh+dt@...nel.org>
Cc:     linux-kernel@...r.kernel.org, linux-media@...r.kernel.org,
        srv_heupstream@...iatek.com, linux-mediatek@...ts.infradead.org,
        linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org,
        Minghsiu Tsai <minghsiu.tsai@...iatek.com>,
        Bin Liu <bin.liu@...iatek.com>
Subject: Re: [PATCH v9 3/4] arm: dts: mt2701: Add node for Mediatek JPEG
 Decoder



On 14/12/16 09:04, Rick Chang wrote:
> Signed-off-by: Rick Chang <rick.chang@...iatek.com>
> Signed-off-by: Minghsiu Tsai <minghsiu.tsai@...iatek.com>
> ---
> This patch depends on:
>    CCF "Add clock support for Mediatek MT2701"[1]
>    iommu and smi "Add the dtsi node of iommu and smi for mt2701"[2]
> 
> [1] http://lists.infradead.org/pipermail/linux-mediatek/2016-October/007271.html
> [2] https://patchwork.kernel.org/patch/9164013/

Now queued for v4.12-next/dts32

Thanks and sorry for the delay.
Matthias

> ---
>   arch/arm/boot/dts/mt2701.dtsi | 14 ++++++++++++++
>   1 file changed, 14 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/mt2701.dtsi b/arch/arm/boot/dts/mt2701.dtsi
> index 8f13c70..4dd5048 100644
> --- a/arch/arm/boot/dts/mt2701.dtsi
> +++ b/arch/arm/boot/dts/mt2701.dtsi
> @@ -298,6 +298,20 @@
>   		power-domains = <&scpsys MT2701_POWER_DOMAIN_ISP>;
>   	};
>   
> +	jpegdec: jpegdec@...04000 {
> +		compatible = "mediatek,mt2701-jpgdec";
> +		reg = <0 0x15004000 0 0x1000>;
> +		interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_LOW>;
> +		clocks =  <&imgsys CLK_IMG_JPGDEC_SMI>,
> +			  <&imgsys CLK_IMG_JPGDEC>;
> +		clock-names = "jpgdec-smi",
> +			      "jpgdec";
> +		power-domains = <&scpsys MT2701_POWER_DOMAIN_ISP>;
> +		mediatek,larb = <&larb2>;
> +		iommus = <&iommu MT2701_M4U_PORT_JPGDEC_WDMA>,
> +			 <&iommu MT2701_M4U_PORT_JPGDEC_BSDMA>;
> +	};
> +
>   	vdecsys: syscon@...00000 {
>   		compatible = "mediatek,mt2701-vdecsys", "syscon";
>   		reg = <0 0x16000000 0 0x1000>;
>