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Message-ID: <1494423889-25799-9-git-send-email-douly.fnst@cn.fujitsu.com>
Date:   Wed, 10 May 2017 21:44:45 +0800
From:   Dou Liyang <douly.fnst@...fujitsu.com>
To:     <x86@...nel.org>, <linux-kernel@...r.kernel.org>
CC:     <tglx@...utronix.de>, <mingo@...nel.org>, <hpa@...or.com>,
        <ebiederm@...ssion.com>, <bhe@...hat.com>,
        <izumi.taku@...fujitsu.com>, Dou Liyang <douly.fnst@...fujitsu.com>
Subject: [RFC PATCH v3 08/12] x86/apic: Make interrupt mode setup earlier for SMP-capable system

In the SMP-capable system, enable and setup the interrupt delivery
mode in native_smp_prepare_cpus() which almost be called at the end of
start_kernel() in rest_init().

But, due to default mode may not be compatible with the actual interrupt
registers, calibrating delay which needs the timer IRQs may be failed
in dump-capture kernel.

The MP table or ACPI has been read earlier, setup the interrupt mode as
soon as possible, make the system run in the final mode to avoid the
compatibility issues.

Core patch for SMP-capable system.

Signed-off-by: Dou Liyang <douly.fnst@...fujitsu.com>
---
 arch/x86/kernel/apic/apic.c | 21 +++++++++++++++++++++
 arch/x86/kernel/smpboot.c   | 10 ----------
 2 files changed, 21 insertions(+), 10 deletions(-)

diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
index 614ee6b..941ae1e 100644
--- a/arch/x86/kernel/apic/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@ -1161,6 +1161,7 @@ enum apic_interrupt_mode {
 	APIC_PIC = 0,
 	APIC_VIRTUAL_WIRE,
 	APIC_SYMMETRIC_IO,
+	APIC_SYMMETRIC_IO_NO_ROUTING,
 	APIC_MODE_COUNT
 };
 
@@ -1215,6 +1216,20 @@ static int __init apic_interrupt_mode_select(void)
 
 	/* Other checks of APIC options will be done in each setup function */
 
+#ifdef CONFIG_SMP
+	if (read_apic_id() != boot_cpu_physical_apicid) {
+		panic("Boot APIC ID in local APIC unexpected (%d vs %d)",
+		     read_apic_id(), boot_cpu_physical_apicid);
+		/* Or can we switch back to PIC here? */
+	}
+
+	/* If SMP should be disabled, then really disable it! */
+	if (!setup_max_cpus) {
+		pr_info("SMP mode deactivated\n");
+		return APIC_SYMMETRIC_IO_NO_ROUTING;
+	}
+#endif
+
 	return APIC_SYMMETRIC_IO;
 }
 
@@ -1279,6 +1294,12 @@ void __init apic_interrupt_mode_init(void)
 		return;
 	case APIC_SYMMETRIC_IO:
 		pr_info("Switch to symmectic I/O mode\n");
+		default_setup_apic_routing();
+		apic_bsp_setup(false);
+		return;
+	case APIC_SYMMETRIC_IO_NO_ROUTING:
+		pr_info("Switch to symmectic I/O mode with no APIC routing\n");
+		apic_bsp_setup(false);
 		return;
 	}
 }
diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c
index 4e706e7..2101d5c 100644
--- a/arch/x86/kernel/smpboot.c
+++ b/arch/x86/kernel/smpboot.c
@@ -1332,21 +1332,11 @@ void __init native_smp_prepare_cpus(unsigned int max_cpus)
 		return;
 	case SMP_FORCE_UP:
 		disable_smp();
-		apic_bsp_setup(false);
 		return;
 	case SMP_OK:
 		break;
 	}
 
-	if (read_apic_id() != boot_cpu_physical_apicid) {
-		panic("Boot APIC ID in local APIC unexpected (%d vs %d)",
-		     read_apic_id(), boot_cpu_physical_apicid);
-		/* Or can we switch back to PIC here? */
-	}
-
-	default_setup_apic_routing();
-	cpu0_logical_apicid = apic_bsp_setup(false);
-
 	if (x2apic_mode)
 		cpu0_logical_apicid = apic_read(APIC_LDR);
 	else
-- 
2.5.5



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