lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Thu, 11 May 2017 09:45:25 +0100
From:   Will Deacon <will.deacon@....com>
To:     "Rafael J. Wysocki" <rjw@...ysocki.net>
Cc:     Geetha sowjanya <gakula@...iumnetworks.com>,
        Lv Zheng <lv.zheng@...el.com>,
        Robert Moore <robert.moore@...el.com>, robin.murphy@....com,
        lorenzo.pieralisi@....com, hanjun.guo@...aro.org,
        sudeep.holla@....com, iommu@...ts.linux-foundation.org,
        jcm@...hat.com, linux-kernel@...r.kernel.org,
        robert.richter@...ium.com, catalin.marinas@....com,
        sgoutham@...ium.com, linux-arm-kernel@...ts.infradead.org,
        linux-acpi@...r.kernel.org, geethasowjanya.akula@...il.com,
        linu.cherian@...ium.com, Charles.Garcia-Tobin@....com,
        Geetha Sowjanya <geethasowjanya.akula@...ium.com>
Subject: Re: [v5 1/4] ACPICA: IORT: Add Cavium ThunderX2 SMMUv3 model
 definition.

On Thu, May 11, 2017 at 02:26:02AM +0200, Rafael J. Wysocki wrote:
> On Wednesday, May 10, 2017 05:01:55 PM Geetha sowjanya wrote:
> > From: Linu Cherian <linu.cherian@...ium.com>
> > 
> > Add SMMUv3 model definition for ThunderX2.
> > 
> > Signed-off-by: Linu Cherian <linu.cherian@...ium.com>
> > Signed-off-by: Geetha Sowjanya <geethasowjanya.akula@...ium.com>
> 
> This is an ACPICA change, but you have not included the ACPICA maintainers
> into your original CC list (added now).
> 
> Bob, Lv, how should this be routed?
> 
> Do you want to apply this patch upstream first or can we make this change in
> Linux and upstream in parallel?  That shouldn't be a big deal, right?

I think we're still waiting for the updated IORT document to be published (I
think this should be in the next week or so), so I don't think we should
commit the new ID before that happens.

Will

> > ---
> >  include/acpi/actbl2.h | 2 ++
> >  1 file changed, 2 insertions(+)
> > 
> > diff --git a/include/acpi/actbl2.h b/include/acpi/actbl2.h
> > index faa9f2c..76a6f5d 100644
> > --- a/include/acpi/actbl2.h
> > +++ b/include/acpi/actbl2.h
> > @@ -779,6 +779,8 @@ struct acpi_iort_smmu {
> >  #define ACPI_IORT_SMMU_CORELINK_MMU400  0x00000002	/* ARM Corelink MMU-400 */
> >  #define ACPI_IORT_SMMU_CORELINK_MMU500  0x00000003	/* ARM Corelink MMU-500 */
> >  
> > +#define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX 0x00000002 /* Cavium ThunderX2 SMMUv3 */
> > +
> >  /* Masks for Flags field above */
> >  
> >  #define ACPI_IORT_SMMU_DVM_SUPPORTED    (1)
> > 
> 
> Thanks,
> Rafael
> 

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ