[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <20170514113222.GA10578@kroah.com>
Date: Sun, 14 May 2017 13:32:22 +0200
From: Greg Kroah-Hartman <gregkh@...uxfoundation.org>
To: Jan Kiszka <jan.kiszka@...mens.com>
Cc: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
linux-serial@...r.kernel.org,
Sudip Mukherjee <sudip.mukherjee@...ethink.co.uk>
Subject: Re: [PATCH v2] serial: exar: Fix stuck MSIs
On Sat, May 13, 2017 at 09:09:17AM +0200, Jan Kiszka wrote:
> On 2017-04-24 14:07, Andy Shevchenko wrote:
> > On Mon, 2017-04-24 at 12:30 +0200, Jan Kiszka wrote:
> >> After migrating 8250_exar to MSI in 172c33cb61da, we can get stuck
> >> without further interrupts because of the special wake-up event these
> >> chips send. They are only cleared by reading INT0. As we fail to do so
> >> during startup and shutdown, we can leave the interrupt line asserted,
> >> which is fatal with edge-triggered MSIs.
> >>
> >> Add the required reading of INT0 to startup and shutdown. Also account
> >> for the fact that a pending wake-up interrupt means we have to return
> >> 1
> >> from exar_handle_irq. Drop the unneeded reading of INT1..3 along with
> >> this - those never reset anything.
> >>
> >> An alternative approach would have been disabling the wake-up
> >> interrupt.
> >> Unfortunately, this feature (REGB[17] = 1) is not available on the
> >> XR17D15X.
> >
> > FWIW:
> > Reviewed-by: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
> >
>
> Ping. Needs to go into stable 4.11 now as well.
Relax, I'll get to it after 4.12-rc1 is out...
Powered by blists - more mailing lists